On 8/10/21 12:51 pm, Andrew Lunn wrote:
Some responses below.
Note I'll be on leave next week so I'll send v2 when I'm back the
following week. That'll also allow some time for any other comments to
come in.
> On Fri, Oct 08, 2021 at 12:06:19PM +1300, Chris Packham wrote:
>> The CN9130-CRB boards have a MV88E6393X switch connected to eth0. Add
>> the necessary dts nodes and properties for this.
>>
>> Signed-off-by: Chris Packham <chris.packham@xxxxxxxxxxxxxxxxxxx>
>> ---
>>
>> This is taken from the Marvell SDK. I've re-ordered the port entries to
>> be in ascending order.
>>
>> arch/arm64/boot/dts/marvell/cn9130-crb.dtsi | 125 ++++++++++++++++++++
>> 1 file changed, 125 insertions(+)
>>
>> diff --git a/arch/arm64/boot/dts/marvell/cn9130-crb.dtsi b/arch/arm64/boot/dts/marvell/cn9130-crb.dtsi
>> index e7918f325646..171f7394948e 100644
>> --- a/arch/arm64/boot/dts/marvell/cn9130-crb.dtsi
>> +++ b/arch/arm64/boot/dts/marvell/cn9130-crb.dtsi
>> @@ -185,6 +185,131 @@ &cp0_mdio {
>> phy0: ethernet-phy@0 {
>> reg = <0>;
>> };
>> +
>> + switch6: switch0@6 {
>> + /* Actual device is MV88E6393X */
>> + compatible = "marvell,mv88e6190";
>> + #address-cells = <1>;
>> + #size-cells = <0>;
>> + reg = <6>;
> Is the interrupt output connected to a GPIO?
Yes it appears to be connected to CP_MPP28 although the comments in the
schematic suggest this was added in Rev 1.30 of the design. I think that
corresponds to the board I have but may not cover all the boards out
there in the wild. I'll try adding it.
>
>> +
>> + dsa,member = <0 0>;
>> +
>> + ports {
>> + #address-cells = <1>;
>> + #size-cells = <0>;
>> +
>> + port@0 {
>> + reg = <0>;
>> + label = "notused-port0";
>> + phy-mode = "10gbase-kr";
>> + status = "disabled";
> What is meant by not used? Does it go to a header? Is it not wired at
> all? You don't need to list a port if it is not actually used. So
> maybe you just want to delete this port all together?
>
It's completely disconnected so I'll remove the port.
>> +
>> + };
>> +
>> + port@1 {
>> + reg = <1>;
>> + label = "wan1";
>> + phy-handle = <&switch0phy1>;
>> + };
>> +
>
>> +
>> + port@8 {
>> + reg = <8>;
>> + label = "lan8";
>> + phy-handle = <&switch0phy8>;
>> + };
>> +
>> + port@9 {
>> + reg = <9>;
>> + label = "wanp9";
> Do these names correspond to some labeling? Ether the case or the silk
> screen?
The silkscreen just says P1-P8. I was tempted to rename "wan1" -> "lan1"
to match the others. I could also change them all to "pN" or "portN" if
preferred.
> wanp9 is an odd name. Is it connected to a header?
P9 is connected to a SFP+ cage. I know there has been some work on the
bindings for that which I haven't caught up with. Again I can rename
this to "lan9", "p9" or "port9" as desired. But perhaps I'd be better
off to not include the port and just leave a note here to say port9
needs the sfp bindings (or I could get to grips with the bindings).
>
>> + phy-mode = "10gbase-kr";
>> + fixed-link {
>> + speed = <10000>;
>> + full-duplex;
>> + };
>> + };
> Andrew
