Re: [net-next PATCH 10/13] net: dsa: qca8k: add explicit SGMII PLL enable

[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]

 



On Thu, Oct 07, 2021 at 02:29:46AM +0200, Andrew Lunn wrote:
> On Thu, Oct 07, 2021 at 12:36:00AM +0200, Ansuel Smith wrote:
> > Support enabling PLL on the SGMII CPU port. Some device require this
> > special configuration or no traffic is transmitted and the switch
> > doesn't work at all. A dedicated binding is added to the CPU node
> > port to apply the correct reg on mac config.
> 
> Why not just enable this all the time when the CPU port is in SGMII
> mode?

I don't know if you missed the cover letter with the reason. Sgmii PLL
is a mess. Some device needs it and some doesn't. With a wrong
configuration the result is not traffic. As it's all messy we decided to
set the PLL to be enabled with a dedicated binding and set it disabled
by default. We enouncer more device that require it disabled than device
that needs it enabled. (in the order of 70 that doesn't needed it and 2
that requires it enabled or port instability/no traffic/leds problem)

> 
> Is it also needed for 1000BaseX?
> 

We assume it really depends on the device.

> DT properties like this are hard to use. It would be better if the
> switch can decide for itself if it needs the PLL enabled.
> 

Again reason in the cover letter sgmii part. Some qca driver have some
logic based on switch revision. We tried that and it didn't work since
some device had no traffic with pll enabled (and with the revision set
to enable pll)

>        Andrew

-- 
	Ansuel



[Index of Archives]     [Device Tree Compilter]     [Device Tree Spec]     [Linux Driver Backports]     [Video for Linux]     [Linux USB Devel]     [Linux PCI Devel]     [Linux Audio Users]     [Linux Kernel]     [Linux SCSI]     [XFree86]     [Yosemite Backpacking]


  Powered by Linux