Re: [net-next PATCH 10/13] net: dsa: qca8k: add explicit SGMII PLL enable

[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]

 



On Thu, Oct 07, 2021 at 12:36:00AM +0200, Ansuel Smith wrote:
> Support enabling PLL on the SGMII CPU port. Some device require this
> special configuration or no traffic is transmitted and the switch
> doesn't work at all. A dedicated binding is added to the CPU node
> port to apply the correct reg on mac config.

Why not just enable this all the time when the CPU port is in SGMII
mode?

Is it also needed for 1000BaseX?

DT properties like this are hard to use. It would be better if the
switch can decide for itself if it needs the PLL enabled.

       Andrew



[Index of Archives]     [Device Tree Compilter]     [Device Tree Spec]     [Linux Driver Backports]     [Video for Linux]     [Linux USB Devel]     [Linux PCI Devel]     [Linux Audio Users]     [Linux Kernel]     [Linux SCSI]     [XFree86]     [Yosemite Backpacking]


  Powered by Linux