Hi Will, Rob has Acked DT bindings. Do you have any further review comments? Thanks, Bhaskara >-----Original Message----- >From: Bhaskara Budiredla <bbudiredla@xxxxxxxxxxx> >Sent: Wednesday, September 8, 2021 5:34 PM >To: will@xxxxxxxxxx; mark.rutland@xxxxxxx; robh+dt@xxxxxxxxxx; Sunil >Kovvuri Goutham <sgoutham@xxxxxxxxxxx> >Cc: linux-arm-kernel@xxxxxxxxxxxxxxxxxxx; devicetree@xxxxxxxxxxxxxxx; linux- >kernel@xxxxxxxxxxxxxxx; Bhaskara Budiredla <bbudiredla@xxxxxxxxxxx> >Subject: [PATCH v5 0/2] drivers: perf: Add Marvell CN10K LLC-TAD pmu driver > >This series introduces performance monitor driver to Last-level-cache tag- >and-data (LLC-TAD) PMU which is an intergral part of Marvell CN10K SoCs. >The configuration and functionality of the TAD PMU is covered in patch 1. >The device tree bindings are dealt in patch 2. > >v5: > - add prefix, type, description for vendor specific properties > in DT bindings (Rob Herring) > >v4: > - rebased on kernel v5.14-rc7 > - eliminate yamllint errors (Rob Herring) > >v3: > - rebased on kernel v5.14-rc5 > - disable sampling events via PERF_PMU_CAP_NO_INTERRUPT (Will Deacon) > - convert tad pmu bindings to schema (Will Deacon) > - replace tighter semantics with *_relaxed() accesses (Will Deacon) > - use PMU_EVENT_ATTR_ID generic macro (Will Deacon) > - allow cleanup of allocations through devm_kcalloc() (Will Deacon) > >v2: > - rebased on kernel v5.13-rc3 > >Bhaskara Budiredla (2): > drivers: perf: Add LLC-TAD perf counter support > dt-bindings: perf: Add YAML schemas for Marvell CN10K LLC-TAD pmu > bindings > > .../bindings/perf/marvell-cn10k-tad.yaml | 63 +++ > drivers/perf/Kconfig | 7 + > drivers/perf/Makefile | 1 + > drivers/perf/marvell_cn10k_tad_pmu.c | 430 ++++++++++++++++++ > 4 files changed, 501 insertions(+) > create mode 100644 Documentation/devicetree/bindings/perf/marvell- >cn10k-tad.yaml > create mode 100644 drivers/perf/marvell_cn10k_tad_pmu.c > >-- >2.17.1
