On Wed, Sep 22, 2021 at 12:18 PM Bartosz Golaszewski <bgolaszewski@xxxxxxxxxxxx> wrote: > > On Mon, Aug 23, 2021 at 10:14 AM Michal Simek <michal.simek@xxxxxxxxxx> wrote: > > > > Hi Bart, > > > > On 8/23/21 10:02 AM, Bartosz Golaszewski wrote: > > > On Wed, Aug 18, 2021 at 10:11 AM Piyush Mehta <piyush.mehta@xxxxxxxxxx> wrote: > > >> > > >> This patch adds driver support for the zynqmp modepin GPIO controller. > > >> GPIO modepin driver set and get the value and status of the PS_MODE pin, > > >> based on device-tree pin configuration. These four mode pins are > > >> configurable as input/output. The mode pin has a control register, which > > >> have lower four-bits [0:3] are configurable as input/output, next four-bits > > >> can be used for reading the data as input[4:7], and next setting the > > >> output pin state output[8:11]. > > >> > > >> Signed-off-by: Piyush Mehta <piyush.mehta@xxxxxxxxxx> > > >> Acked-by: Michal Simek <michal.simek@xxxxxxxxxx> > > >> Reviewed-by: Linus Walleij <linus.walleij@xxxxxxxxxx> > > >> --- > > > > > > Which tree should this go through? > > > > I would prefer to go this via gpio tree. > > > > Thanks, > > Michal > > Sure, just make sure to get an Ack from Rob Herring on the DT bindings. > > Bart Nevermind - it's already there. Bart
