Add DT binding for Cadence's XSPI controller driver. Signed-off-by: Konrad Kociolek <konrad@xxxxxxxxxxx> Signed-off-by: Jayshri Pawar <jpawar@xxxxxxxxxxx> Signed-off-by: Parshuram Thombare <pthombar@xxxxxxxxxxx> --- .../devicetree/bindings/spi/cdns,xspi.yaml | 77 ++++++++++++++++++++++ 1 file changed, 77 insertions(+) create mode 100644 Documentation/devicetree/bindings/spi/cdns,xspi.yaml diff --git a/Documentation/devicetree/bindings/spi/cdns,xspi.yaml b/Documentation/devicetree/bindings/spi/cdns,xspi.yaml new file mode 100644 index 0000000..5ebede1 --- /dev/null +++ b/Documentation/devicetree/bindings/spi/cdns,xspi.yaml @@ -0,0 +1,77 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +# Copyright 2020-21 Cadence +%YAML 1.2 +--- +$id: "http://devicetree.org/schemas/spi/cdns,xspi.yaml#"; +$schema: "http://devicetree.org/meta-schemas/core.yaml#"; + +title: Cadence XSPI Controller + +maintainers: + - Parshuram Thombare <pthombar@xxxxxxxxxxx> + +description: | + The XSPI controller allows SPI protocol communication in + single, dual, quad or octal wire transmission modes for + read/write access to slaves such as SPI-NOR flash. + +allOf: + - $ref: "spi-controller.yaml#" + +properties: + compatible: + const: cdns,xspi-nor + + reg: + items: + - description: address and length of the controller register set + - description: address and length of the Slave DMA data port + - description: address and length of the auxiliary registers + + reg-names: + items: + - const: xspi-iobase + - const: xspi-sdmabase + - const: xspi-auxbase + + interrupts: + maxItems: 1 + +required: + - compatible + - reg + - interrupts + +unevaluatedProperties: false + +examples: + - | + #include <dt-bindings/interrupt-controller/irq.h> + bus { + #address-cells = <2>; + #size-cells = <2>; + + xspi: spi@a0010000 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "cdns,xspi-nor"; + reg = <0x0 0xa0010000 0x0 0x10000>, + <0x0 0xb0000000 0x0 0x10000>, + <0x0 0xa0020000 0x0 0x10000>; + reg-names = "xspi-iobase", "xspi-sdmabase", "xspi-auxbase"; + interrupts = <0 90 IRQ_TYPE_LEVEL_HIGH>; + interrupt-parent = <&gic>; + + flash@0 { + compatible = "jedec,spi-nor"; + spi-max-frequency = <75000000>; + reg = <0>; + }; + + flash@1 { + compatible = "jedec,spi-nor"; + spi-max-frequency = <75000000>; + reg = <1>; + }; + }; + }; -- 2.7.4
