Convert Freescale/NXP DDR memory controller bindings to DT schema format
using json-schema.
Previous bindings were not listing all compatibles, so scan through
devicetree sources and drivers to get these.
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@xxxxxxxxxxxxx>
---
.../bindings/memory-controllers/fsl/ddr.txt | 29 -------
.../memory-controllers/fsl/fsl,ddr.yaml | 83 +++++++++++++++++++
2 files changed, 83 insertions(+), 29 deletions(-)
delete mode 100644 Documentation/devicetree/bindings/memory-controllers/fsl/ddr.txt
create mode 100644 Documentation/devicetree/bindings/memory-controllers/fsl/fsl,ddr.yaml
diff --git a/Documentation/devicetree/bindings/memory-controllers/fsl/ddr.txt b/Documentation/devicetree/bindings/memory-controllers/fsl/ddr.txt
deleted file mode 100644
index dde6d837083a..000000000000
--- a/Documentation/devicetree/bindings/memory-controllers/fsl/ddr.txt
+++ /dev/null
@@ -1,29 +0,0 @@
-Freescale DDR memory controller
-
-Properties:
-
-- compatible : Should include "fsl,chip-memory-controller" where
- chip is the processor (bsc9132, mpc8572 etc.), or
- "fsl,qoriq-memory-controller".
-- reg : Address and size of DDR controller registers
-- interrupts : Error interrupt of DDR controller
-- little-endian : Specifies little-endian access to registers
- If omitted, big-endian will be used.
-
-Example 1:
-
- memory-controller@2000 {
- compatible = "fsl,bsc9132-memory-controller";
- reg = <0x2000 0x1000>;
- interrupts = <16 2 1 8>;
- };
-
-
-Example 2:
-
- ddr1: memory-controller@8000 {
- compatible = "fsl,qoriq-memory-controller-v4.7",
- "fsl,qoriq-memory-controller";
- reg = <0x8000 0x1000>;
- interrupts = <16 2 1 23>;
- };
diff --git a/Documentation/devicetree/bindings/memory-controllers/fsl/fsl,ddr.yaml b/Documentation/devicetree/bindings/memory-controllers/fsl/fsl,ddr.yaml
new file mode 100644
index 000000000000..af5147f9da72
--- /dev/null
+++ b/Documentation/devicetree/bindings/memory-controllers/fsl/fsl,ddr.yaml
@@ -0,0 +1,83 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/memory-controllers/fsl/fsl,ddr.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Freescale DDR memory controller
+
+maintainers:
+ - Borislav Petkov <bp@xxxxxxxxx>
+ - York Sun <york.sun@xxxxxxx>
+
+properties:
+ $nodename:
+ pattern: "^memory-controller@[0-9a-f]+$"
+
+ compatible:
+ oneOf:
+ - items:
+ - enum:
+ - fsl,qoriq-memory-controller-v4.4
+ - fsl,qoriq-memory-controller-v4.5
+ - fsl,qoriq-memory-controller-v4.7
+ - fsl,qoriq-memory-controller-v5.0
+ - const: fsl,qoriq-memory-controller
+ - enum:
+ - fsl,bsc9132-memory-controller
+ - fsl,8540-memory-controller
+ - fsl,8541-memory-controller
+ - fsl,8544-memory-controller
+ - fsl,8548-memory-controller
+ - fsl,8555-memory-controller
+ - fsl,8568-memory-controller
+ - fsl,mpc8536-memory-controller
+ - fsl,mpc8540-memory-controller
+ - fsl,mpc8541-memory-controller
+ - fsl,mpc8544-memory-controller
+ - fsl,mpc8548-memory-controller
+ - fsl,mpc8555-memory-controller
+ - fsl,mpc8560-memory-controller
+ - fsl,mpc8568-memory-controller
+ - fsl,mpc8569-memory-controller
+ - fsl,mpc8572-memory-controller
+ - fsl,mpc8349-memory-controller
+ - fsl,p1020-memory-controller
+ - fsl,p1021-memory-controller
+ - fsl,p2020-memory-controller
+ - fsl,qoriq-memory-controller
+
+ interrupts:
+ maxItems: 1
+
+ little-endian:
+ description:
+ Specifies little-endian access to registers. If omitted, big-endian will
+ be used.
+ type: boolean
+
+ reg:
+ maxItems: 1
+
+required:
+ - compatible
+ - interrupts
+ - reg
+
+additionalProperties: false
+
+examples:
+ - |
+ memory-controller@2000 {
+ compatible = "fsl,bsc9132-memory-controller";
+ reg = <0x2000 0x1000>;
+ interrupts = <16 2 1 8>;
+ };
+
+ - |
+ memory-controller@8000 {
+ compatible = "fsl,qoriq-memory-controller-v4.7",
+ "fsl,qoriq-memory-controller";
+ reg = <0x8000 0x1000>;
+ interrupts = <16 2 1 23>;
+ };
--
2.30.2
