On Sat, Aug 14, 2021 at 04:41:58PM -0700, Colin Foster wrote: > So DSA requires a fixed-link property. How did you come to that conclusion? As mentioned twice already, DSA registers a phylink for the CPU port, and phylink works with either a phy-handle or a fixed-link. Support for this has been added more than 2 years ago: https://patchwork.ozlabs.org/project/netdev/patch/1558992127-26008-11-git-send-email-ioana.ciornei@xxxxxxx/ You have a PHY... so use a phy-handle. > And that makes sense... who in > their right mind would connect switches on a board using an RJ45 > connection :) Then the only reason any of this is working is because I > have eth0 set up as an RJ45 connection, and because of that I need the > hack to enable the phy on the switch port 0... > > Maybe that's a question: > Is my devicetree incorrect for claiming the connection is SGMII when it > should be RJ45? Your device tree description is absolutely incorrect by all accounts. First of all, "is SGMII" does not really preclude "is RJ45", because you can have an external PHY connected to your MAC via SGMII, and that external PHY would provide RJ45 access. That would be absolutely fine too. That would be described as: port@0 { phy-mode = "sgmii"; phy-handle = <&external_phy>; }; It would be absolutely fine as well to describe the RJ45 port via an internal PHY if that's how things are hooked up in your eval board (really don't know what PHY you have, sorry): port@0 { phy-mode = "internal"; phy-handle = <&internal_phy>; }; But in the absence of a phy-handle and the presence of fixed-link, like the way you are describing it, you are telling Linux that you have an SGMII PHY-less system, where the SGMII lane goes directly towards the outside world. I think it is actually written somewhere in the documentation that describing a connection to a PHY using a fixed-link is wrong and strongly discouraged. > Or is my setup incorrect for using RJ45 and there's no > way to configure it that way, so the fact that it functions is an > anomaly? No, the setup is not incorrect, it is just fine and both DSA and phylink support it as long as it is described properly, with the adequate phy-handle on the CPU port.
