Configure uart5 as debug uart and split the pinctrl functions
to match with SoC dt.
Signed-off-by: Rajesh Patil <rajpat@xxxxxxxxxxxxxx>
---
arch/arm64/boot/dts/qcom/sc7280-idp.dtsi | 19 ++++++++-----------
1 file changed, 8 insertions(+), 11 deletions(-)
diff --git a/arch/arm64/boot/dts/qcom/sc7280-idp.dtsi b/arch/arm64/boot/dts/qcom/sc7280-idp.dtsi
index c41c2d0..53993b3 100644
--- a/arch/arm64/boot/dts/qcom/sc7280-idp.dtsi
+++ b/arch/arm64/boot/dts/qcom/sc7280-idp.dtsi
@@ -254,6 +254,7 @@
};
&uart5 {
+ compatible = "qcom,geni-debug-uart";
status = "okay";
};
@@ -311,18 +312,14 @@
bias-pull-up;
};
-&qup_uart5_default {
- tx {
- pins = "gpio46";
- drive-strength = <2>;
- bias-disable;
- };
+&qup_uart5_tx {
+ drive-strength = <2>;
+ bias-disable;
+};
- rx {
- pins = "gpio47";
- drive-strength = <2>;
- bias-pull-up;
- };
+&qup_uart5_rx {
+ drive-strength = <2>;
+ bias-pull-up;
};
&sdc1_on {
--
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