On Fri, Jul 30, 2021 at 03:45:50PM +0200, Bert Vermeulen wrote: > From: John Crispin <john@xxxxxxxxxxx> > > Add basic support for EcoNet EN7523, enough for booting to console. > > The UART is basically 8250-compatible, except for the clock selection. > A clock-frequency value is synthesized to get this to run at 115200 bps. > > Signed-off-by: John Crispin <john@xxxxxxxxxxx> > Signed-off-by: Bert Vermeulen <bert@xxxxxxxx> > --- > arch/arm/boot/dts/Makefile | 2 + > arch/arm/boot/dts/en7523-evb.dts | 17 ++++ > arch/arm/boot/dts/en7523.dtsi | 128 +++++++++++++++++++++++++++++++ > 3 files changed, 147 insertions(+) > create mode 100644 arch/arm/boot/dts/en7523-evb.dts > create mode 100644 arch/arm/boot/dts/en7523.dtsi > > + cpus { > + #address-cells = <1>; > + #size-cells = <0>; > + cpu0: cpu@0 { > + device_type = "cpu"; > + compatible = "arm,cortex-a7"; > + reg = <0x0>; > + enable-method = "psci"; > + clock-frequency = <80000000>; > + next-level-cache = <&L2_0>; > + > + }; > + gic: interrupt-controller@09000000 { > + compatible = "arm,gic-v3"; > + interrupt-controller; > + #interrupt-cells = <3>; > + #address-cells = <1>; > + #size-cells = <1>; > + reg = <0x09000000 0x20000>, > + <0x09080000 0x80000>; > + interrupts = <GIC_PPI 9 IRQ_TYPE_LEVEL_LOW>; > + > + its: gic-its@09020000 { > + compatible = "arm,gic-v3-its"; > + msi-controller; > + #msi-cell = <1>; Missing 's' here for '#msi-cells'. > + reg = <0x090200000 0x20000>; > + }; > + }; Looking at this again, I was under the impression that Cortex-A7 only supported GICv2; is this actually a Cortex-A7 or a different CPU? Which revision is this? Thanks, Mark.