On Fri, Jul 30, 2021 at 03:45:50PM +0200, Bert Vermeulen wrote:
> From: John Crispin <john@xxxxxxxxxxx>
>
> Add basic support for EcoNet EN7523, enough for booting to console.
>
> The UART is basically 8250-compatible, except for the clock selection.
> A clock-frequency value is synthesized to get this to run at 115200 bps.
>
> Signed-off-by: John Crispin <john@xxxxxxxxxxx>
> Signed-off-by: Bert Vermeulen <bert@xxxxxxxx>
> ---
> arch/arm/boot/dts/Makefile | 2 +
> arch/arm/boot/dts/en7523-evb.dts | 17 ++++
> arch/arm/boot/dts/en7523.dtsi | 128 +++++++++++++++++++++++++++++++
> 3 files changed, 147 insertions(+)
> create mode 100644 arch/arm/boot/dts/en7523-evb.dts
> create mode 100644 arch/arm/boot/dts/en7523.dtsi
[...]
> + gic: interrupt-controller@09000000 {
> + compatible = "arm,gic-v3";
> + interrupt-controller;
> + #interrupt-cells = <3>;
> + #address-cells = <1>;
> + #size-cells = <1>;
> + reg = <0x09000000 0x20000>,
> + <0x09080000 0x80000>;
> + interrupts = <GIC_PPI 9 IRQ_TYPE_LEVEL_LOW>;
> +
> + its: gic-its@09020000 {
> + compatible = "arm,gic-v3-its";
> + msi-controller;
> + #msi-cell = <1>;
> + reg = <0x090200000 0x20000>;
> + };
> + };
> +
> + timer {
> + compatible = "arm,armv8-timer";
This should be "arm,armv7-timer".
> + interrupt-parent = <&gic>;
> + interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
> + <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
> + <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
> + <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>;
GICv3 doesn't have a cpumask in its PPI description, so the
GIC_CPU_MASK_SIMPLE() bits should be removed.
> + clock-frequency = <25000000>;
Please have your FW configure CNTFRQ on each CPU; the clock-frequency
property in the DT is a workaround for broken FW, and it's *vastly*
preferable for FW to configure this correctly (e.g. as it means VMs
should "just work").
Thanks,
Mark.
