Hi,
Am Mittwoch, 28. Juli 2021, 18:10:19 CEST schrieb Michael Riesch:
> While both RK3566 and RK3568 feature the gmac1 node, the gmac0
> node is exclusive to the RK3568.
>
> Signed-off-by: Michael Riesch <michael.riesch@xxxxxxxxxxxxxx>
> ---
> arch/arm64/boot/dts/rockchip/rk3568.dtsi | 51 ++++++++++++++++++++++++
> 1 file changed, 51 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/rockchip/rk3568.dtsi b/arch/arm64/boot/dts/rockchip/rk3568.dtsi
> index da01a59f6f26..ec39a2c593b6 100644
> --- a/arch/arm64/boot/dts/rockchip/rk3568.dtsi
> +++ b/arch/arm64/boot/dts/rockchip/rk3568.dtsi
> @@ -22,6 +22,57 @@
> compatible = "rockchip,rk3568-qos", "syscon";
> reg = <0x0 0xfe190200 0x0 0x20>;
> };
> +
> + gmac0: ethernet@fe2a0000 {
> + compatible = "rockchip,rk3568-gmac", "snps,dwmac-4.20a";
> + reg = <0x0 0xfe2a0000 0x0 0x10000>;
> + interrupts = <GIC_SPI 27 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>;
> + interrupt-names = "macirq", "eth_wake_irq";
> + rockchip,grf = <&grf>;
> + clocks = <&cru SCLK_GMAC0>, <&cru SCLK_GMAC0_RX_TX>,
> + <&cru SCLK_GMAC0_RX_TX>, <&cru CLK_MAC0_REFOUT>,
> + <&cru ACLK_GMAC0>, <&cru PCLK_GMAC0>,
> + <&cru SCLK_GMAC0_RX_TX>, <&cru CLK_GMAC0_PTP_REF>,
> + <&cru PCLK_XPCS>;
> + clock-names = "stmmaceth", "mac_clk_rx",
> + "mac_clk_tx", "clk_mac_refout",
> + "aclk_mac", "pclk_mac",
> + "clk_mac_speed", "ptp_ref",
> + "pclk_xpcs";
> + resets = <&cru SRST_A_GMAC0>;
> + reset-names = "stmmaceth";
> +
is this missing a rockchip,grf phandle?
gmac1 has one and the driver side also does want to access the grf for both
controllers.
Heiko
> + snps,mixed-burst;
> + snps,tso;
> +
> + snps,axi-config = <&gmac0_stmmac_axi_setup>;
> + snps,mtl-rx-config = <&gmac0_mtl_rx_setup>;
> + snps,mtl-tx-config = <&gmac0_mtl_tx_setup>;
> + status = "disabled";
> +
> + mdio0: mdio {
> + compatible = "snps,dwmac-mdio";
> + #address-cells = <0x1>;
> + #size-cells = <0x0>;
> + };
> +
> + gmac0_stmmac_axi_setup: stmmac-axi-config {
> + snps,wr_osr_lmt = <4>;
> + snps,rd_osr_lmt = <8>;
> + snps,blen = <0 0 0 0 16 8 4>;
> + };
> +
> + gmac0_mtl_rx_setup: rx-queues-config {
> + snps,rx-queues-to-use = <1>;
> + queue0 {};
> + };
> +
> + gmac0_mtl_tx_setup: tx-queues-config {
> + snps,tx-queues-to-use = <1>;
> + queue0 {};
> + };
> + };
> };
>
> &cpu0_opp_table {
>
