From: Manivannan Sadhasivam <manivannan.sadhasivam@xxxxxxxxxx> Add DTS bindings for the HiKey 970 board's PCIe hardware. Co-developed-by: Mauro Carvalho Chehab <mchehab+huawei@xxxxxxxxxx> Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@xxxxxxxxxx> Signed-off-by: Mauro Carvalho Chehab <mchehab+huawei@xxxxxxxxxx> --- arch/arm64/boot/dts/hisilicon/hi3670.dtsi | 71 +++++++++++++++++++ .../boot/dts/hisilicon/hikey970-pmic.dtsi | 1 - drivers/pci/controller/dwc/pcie-kirin.c | 12 ---- 3 files changed, 71 insertions(+), 13 deletions(-) diff --git a/arch/arm64/boot/dts/hisilicon/hi3670.dtsi b/arch/arm64/boot/dts/hisilicon/hi3670.dtsi index 1f228612192c..6dfcfcfeedae 100644 --- a/arch/arm64/boot/dts/hisilicon/hi3670.dtsi +++ b/arch/arm64/boot/dts/hisilicon/hi3670.dtsi @@ -177,6 +177,12 @@ sctrl: sctrl@fff0a000 { #clock-cells = <1>; }; + pmctrl: pmctrl@fff31000 { + compatible = "hisilicon,hi3670-pmctrl", "syscon"; + reg = <0x0 0xfff31000 0x0 0x1000>; + #clock-cells = <1>; + }; + iomcu: iomcu@ffd7e000 { compatible = "hisilicon,hi3670-iomcu", "syscon"; reg = <0x0 0xffd7e000 0x0 0x1000>; @@ -660,6 +666,71 @@ gpio28: gpio@fff1d000 { clock-names = "apb_pclk"; }; + its_pcie: interrupt-controller@f4000000 { + compatible = "arm,gic-v3-its"; + msi-controller; + reg = <0x0 0xf5100000 0x0 0x100000>; + }; + + pcie_phy: pcie-phy@fc000000 { + compatible = "hisilicon,hi970-pcie-phy"; + reg = <0x0 0xfc000000 0x0 0x80000>; + + phy-supply = <&ldo33>; + + clocks = <&crg_ctrl HI3670_CLK_GATE_PCIEPHY_REF>, + <&crg_ctrl HI3670_CLK_GATE_PCIEAUX>, + <&crg_ctrl HI3670_PCLK_GATE_PCIE_PHY>, + <&crg_ctrl HI3670_PCLK_GATE_PCIE_SYS>, + <&crg_ctrl HI3670_ACLK_GATE_PCIE>; + clock-names = "phy_ref", "aux", + "apb_phy", "apb_sys", + "aclk"; + + reset-gpios = <&gpio7 0 0 >, <&gpio25 2 0 >, + <&gpio3 1 0 >, <&gpio27 4 0 >; + + clkreq-gpios = <&gpio20 6 0 >, <&gpio27 3 0 >, + <&gpio17 0 0 >; + + /* vboost iboost pre post main */ + hisilicon,eye-diagram-param = <0xFFFFFFFF 0xFFFFFFFF + 0xFFFFFFFF 0xFFFFFFFF + 0xFFFFFFFF>; + + #phy-cells = <0>; + }; + + pcie@f4000000 { + compatible = "hisilicon,kirin970-pcie"; + reg = <0x0 0xf4000000 0x0 0x1000000>, + <0x0 0xfc180000 0x0 0x1000>, + <0x0 0xf5000000 0x0 0x2000>; + reg-names = "dbi", "apb", "config"; + bus-range = <0x0 0x1>; + msi-parent = <&its_pcie>; + #address-cells = <3>; + #size-cells = <2>; + device_type = "pci"; + phys = <&pcie_phy>; + ranges = <0x02000000 0x0 0x00000000 + 0x0 0xf6000000 + 0x0 0x02000000>; + num-lanes = <1>; + #interrupt-cells = <1>; + interrupts = <0 283 4>; + interrupt-names = "msi"; + interrupt-map-mask = <0 0 0 7>; + interrupt-map = <0x0 0 0 1 + &gic GIC_SPI 282 IRQ_TYPE_LEVEL_HIGH>, + <0x0 0 0 2 + &gic GIC_SPI 283 IRQ_TYPE_LEVEL_HIGH>, + <0x0 0 0 3 + &gic GIC_SPI 284 IRQ_TYPE_LEVEL_HIGH>, + <0x0 0 0 4 + &gic GIC_SPI 285 IRQ_TYPE_LEVEL_HIGH>; + }; + /* UFS */ ufs: ufs@ff3c0000 { compatible = "hisilicon,hi3670-ufs", "jedec,ufs-2.1"; diff --git a/arch/arm64/boot/dts/hisilicon/hikey970-pmic.dtsi b/arch/arm64/boot/dts/hisilicon/hikey970-pmic.dtsi index 48c739eacba0..03452e627641 100644 --- a/arch/arm64/boot/dts/hisilicon/hikey970-pmic.dtsi +++ b/arch/arm64/boot/dts/hisilicon/hikey970-pmic.dtsi @@ -73,7 +73,6 @@ ldo33: LDO33 { /* PEX8606 */ regulator-name = "ldo33"; regulator-min-microvolt = <2500000>; regulator-max-microvolt = <3300000>; - regulator-boot-on; }; ldo34: LDO34 { /* GPS AUX IN VDD */ diff --git a/drivers/pci/controller/dwc/pcie-kirin.c b/drivers/pci/controller/dwc/pcie-kirin.c index 7a92f633d746..4657a6d33f6f 100644 --- a/drivers/pci/controller/dwc/pcie-kirin.c +++ b/drivers/pci/controller/dwc/pcie-kirin.c @@ -347,18 +347,6 @@ static const struct regmap_config pcie_kirin_regmap_conf = { .reg_stride = 4, }; -/* Registers in PCIeCTRL */ -static inline void kirin_apb_ctrl_writel(struct kirin_pcie *kirin_pcie, - u32 val, u32 reg) -{ - writel(val, kirin_pcie->apb_base + reg); -} - -static inline u32 kirin_apb_ctrl_readl(struct kirin_pcie *kirin_pcie, u32 reg) -{ - return readl(kirin_pcie->apb_base + reg); -} - static long kirin_pcie_get_resource(struct kirin_pcie *kirin_pcie, struct platform_device *pdev) { -- 2.31.1