Do not merge, this series has yet to be properly tested. Work is in progress for sm8350 display driver support, which will test this series properly. This series implements display clock controller (dispcc) & video clock controller (videocc) support for the Qcom SM8350 SOC. In order to support these new clock controllers, some changes to the alpha plls are required. These changes add support to the Lucid 5LPE PLLs. Robert Foss (11): clk: qcom: common: Add runtime init/suspend/resume clk: qcom: rcg2: Add support for flags clk: qcom: clk-alpha-pll: Fix typo in comment clk: qcom: clk-alpha-pll: Add configuration support for LUCID 5LPE dt-bindings: clock: Add QCOM SM8350 display clock bindings clk: qcom: Add display clock controller driver for SM8350 dt-bindings: clock: Add SM8350 QCOM video clock bindings clk: qcom: Add video clock controller driver for SM8350 arm64: dts: qcom: sm8350: Power up dispcc & videocc on sm8350 by MMCX regulator arm64: dts: qcom: sm8350: Add videocc DT node arm64: dts: qcom: sm8350: Add dispcc DT node .../bindings/clock/qcom,dispcc-sm8x50.yaml | 6 +- .../bindings/clock/qcom,videocc.yaml | 2 + arch/arm64/boot/dts/qcom/sm8350.dtsi | 46 + drivers/clk/qcom/Kconfig | 18 + drivers/clk/qcom/Makefile | 2 + drivers/clk/qcom/clk-alpha-pll.c | 5 +- drivers/clk/qcom/clk-alpha-pll.h | 5 + drivers/clk/qcom/clk-rcg.h | 4 + drivers/clk/qcom/clk-rcg2.c | 3 + drivers/clk/qcom/common.c | 92 ++ drivers/clk/qcom/common.h | 6 + drivers/clk/qcom/dispcc-sm8350.c | 1402 +++++++++++++++++ drivers/clk/qcom/videocc-sm8350.c | 593 +++++++ .../dt-bindings/clock/qcom,dispcc-sm8350.h | 77 + .../dt-bindings/clock/qcom,videocc-sm8350.h | 44 + 15 files changed, 2302 insertions(+), 3 deletions(-) create mode 100644 drivers/clk/qcom/dispcc-sm8350.c create mode 100644 drivers/clk/qcom/videocc-sm8350.c create mode 100644 include/dt-bindings/clock/qcom,dispcc-sm8350.h create mode 100644 include/dt-bindings/clock/qcom,videocc-sm8350.h -- 2.30.2