On Thu 10 Jun 02:11 CDT 2021, Shaik Sajida Bhanu wrote: > Added xo clock for eMMC and Sd card. Was about to push out my branch of patches, but before I do. Can you please describe WHY this is needed? Regards, Bjorn > > Signed-off-by: Shaik Sajida Bhanu <sbhanu@xxxxxxxxxxxxxx> > --- > arch/arm64/boot/dts/qcom/sc7180.dtsi | 10 ++++++---- > 1 file changed, 6 insertions(+), 4 deletions(-) > > diff --git a/arch/arm64/boot/dts/qcom/sc7180.dtsi b/arch/arm64/boot/dts/qcom/sc7180.dtsi > index 295844e..5bb6bd4 100644 > --- a/arch/arm64/boot/dts/qcom/sc7180.dtsi > +++ b/arch/arm64/boot/dts/qcom/sc7180.dtsi > @@ -701,8 +701,9 @@ > interrupt-names = "hc_irq", "pwr_irq"; > > clocks = <&gcc GCC_SDCC1_APPS_CLK>, > - <&gcc GCC_SDCC1_AHB_CLK>; > - clock-names = "core", "iface"; > + <&gcc GCC_SDCC1_AHB_CLK>, > + <&rpmhcc RPMH_CXO_CLK>; > + clock-names = "core", "iface","xo"; > interconnects = <&aggre1_noc MASTER_EMMC 0 &mc_virt SLAVE_EBI1 0>, > <&gem_noc MASTER_APPSS_PROC 0 &config_noc SLAVE_EMMC_CFG 0>; > interconnect-names = "sdhc-ddr","cpu-sdhc"; > @@ -2666,8 +2667,9 @@ > interrupt-names = "hc_irq", "pwr_irq"; > > clocks = <&gcc GCC_SDCC2_APPS_CLK>, > - <&gcc GCC_SDCC2_AHB_CLK>; > - clock-names = "core", "iface"; > + <&gcc GCC_SDCC2_AHB_CLK>, > + <&rpmhcc RPMH_CXO_CLK>; > + clock-names = "core", "iface", "xo"; > > interconnects = <&aggre1_noc MASTER_SDCC_2 0 &mc_virt SLAVE_EBI1 0>, > <&gem_noc MASTER_APPSS_PROC 0 &config_noc SLAVE_SDCC_2 0>; > -- > QUALCOMM INDIA, on behalf of Qualcomm Innovation Center, Inc. is a member > of Code Aurora Forum, hosted by The Linux Foundation >
