[PATCH 1/2] dt-bindings: clk: vc5: Add property for SD polarity

[Sean Anderson <sean.anderson@xxxxxxxx>]

This property allows setting the SD/OE pin's polarity to active-high,
instead of the default of active-low.

Signed-off-by: Sean Anderson <sean.anderson@xxxxxxxx>
---

 Documentation/devicetree/bindings/clock/idt,versaclock5.yaml | 4 ++++
 1 file changed, 4 insertions(+)

diff --git a/Documentation/devicetree/bindings/clock/idt,versaclock5.yaml b/Documentation/devicetree/bindings/clock/idt,versaclock5.yaml
index 28675b0b80f1..e6406c0db624 100644
--- a/Documentation/devicetree/bindings/clock/idt,versaclock5.yaml
+++ b/Documentation/devicetree/bindings/clock/idt,versaclock5.yaml
@@ -64,6 +64,10 @@ properties:
     maximum: 22760
     description: Optional load capacitor for XTAL1 and XTAL2
 
+  idt,sd-active-high:
+    $ref: /schemas/types.yaml#/definitions/flag
+    description: SD/OE pin polarity is active-high
+
 patternProperties:
   "^OUT[1-4]$":
     type: object
-- 
2.25.1