J721E EVM has clock generator that feeds both to the SERDES and to the PCIe slot present in the EVM. In order to use common reference clock on either side of the link, configure SERDES to use external reference clock. Previously SERDES used internal reference clock and the attached device used clock from clock generator in the EVM. Changes from v1: 1) Fixed clock names as suggested by Nishanth 2) Limit to < 100 lines v1: http://lore.kernell.org/r/20210512151209.27560-1-kishon@xxxxxx Kishon Vijay Abraham I (4): arm64: dts: ti: k3-j721e-main: Fix external refclk input to SERDES arm64: dts: ti: k3-j721e-main: Add #clock-cells property to serdes DT node arm64: dts: ti: k3-j721e-common-proc-board: Use external clock for SERDES arm64: dts: ti: k3-j721e-common-proc-board: Re-name "link" name as "phy" .../dts/ti/k3-j721e-common-proc-board.dts | 52 ++++++++++- arch/arm64/boot/dts/ti/k3-j721e-main.dtsi | 86 +++++++++++-------- 2 files changed, 98 insertions(+), 40 deletions(-) -- 2.17.1
