On Thu Apr 22, 2021 at 8:40 PM EDT, Liam Beguin wrote:
> From: Liam Beguin <lvb@xxxxxxxxxx>
>
> Hi,
>
> The LMK04832 is an ultra-high performance clock conditioner with JEDEC
> JESD204B support and is also pin compatible with the LMK0482x family of
> devices.
>
> This driver adds initial support to configure the LMK04832 clocks using
> the clock framework.
>
> This has been tested on a system using JESD204B subclass 1.
>
> At the moment, the VCO rate has to be set manually from the devicetree
> and a dclk (or sclk) rate change isn't propagated to the VCO
> automatically.
>
> Changes since v1:
> - add yaml devicetree documentation,
> - add links to datasheet,
> - use {u8,u16,u32} instead of Uint_ variants,
> - drop redundant debugfs code,
> - use a pointer to device_info instead of struct copy,
> - add of_device_id table,
> - add support for SYSREF digital delay and JESD204B subclass 1
>
> Changes since v2:
> - fix dt-bindings documentation, apologies for the broken build
> - fix property vendor prefixes
> - split dt-bindings into a separate patch
>
> Changes since v3:
> - add missing properties in dt-bindings
>
> Changes since v3:
> - address coccicheck comments
> - update dt-bindings
>
Hi Stephen,
Did you get a chance to have another look at this?
Thanks,
Liam
>
> Thanks for your time,
> Liam
>
> Liam Beguin (3):
> clk: add support for the lmk04832
> clk: lmk04832: add support for digital delay
> dt-bindings: clock: add ti,lmk04832 bindings
>
> .../bindings/clock/ti,lmk04832.yaml | 209 +++
> drivers/clk/Kconfig | 7 +
> drivers/clk/Makefile | 1 +
> drivers/clk/clk-lmk04832.c | 1596 +++++++++++++++++
> 4 files changed, 1813 insertions(+)
> create mode 100644
> Documentation/devicetree/bindings/clock/ti,lmk04832.yaml
> create mode 100644 drivers/clk/clk-lmk04832.c
>
> Range-diff against v4:
> 1: cb6a8ea514d8 ! 1: 11461912b3c4 clk: add support for the lmk04832
> @@ drivers/clk/clk-lmk04832.c (new)
> + if (ret) {
> + dev_err(lmk->dev, "missing reg property in child: %s\n",
> + child->full_name);
> ++ of_node_put(child);
> + goto err_disable_oscin;
> + }
> +
> @@ drivers/clk/clk-lmk04832.c (new)
> +
> + lmk->clkout[reg].sysref =
> + of_property_read_bool(child, "ti,clkout-sysref");
> -+ };
> ++ }
> +
> + lmk->regmap = devm_regmap_init_spi(spi, ®map_config);
> + if (IS_ERR(lmk->regmap)) {
> 2: 8464eac02aab = 2: 01b64b5af4ed clk: lmk04832: add support for digital
> delay
> 3: a2c4e8d53d1c ! 3: 96b514765de0 dt-bindings: clock: add ti,lmk04832
> bindings
> @@ Documentation/devicetree/bindings/clock/ti,lmk04832.yaml (new)
> + const: 1
> +
> + spi-max-frequency:
> -+ $ref: /schemas/types.yaml#/definitions/uint32
> -+ description:
> -+ Maximum SPI clocking speed of the device in Hz.
> ++ maximum: 5000000
> +
> + clocks:
> + items:
> @@ Documentation/devicetree/bindings/clock/ti,lmk04832.yaml (new)
> + required:
> + - reg
> +
> ++ additionalProperties: false
> ++
> +required:
> + - compatible
> + - reg
>
> base-commit: f40ddce88593482919761f74910f42f4b84c004b
> --
> 2.30.1.489.g328c10930387
