The frequency table is SoC specific. Instead of hard coding, pass it
via match data, so that the driver can work for more than just MSM8916.
This is a preparation change for adding MSM8939 A53PLL support.
Signed-off-by: Shawn Guo <shawn.guo@xxxxxxxxxx>
---
drivers/clk/qcom/a53-pll.c | 11 ++++++++---
1 file changed, 8 insertions(+), 3 deletions(-)
diff --git a/drivers/clk/qcom/a53-pll.c b/drivers/clk/qcom/a53-pll.c
index 964f5ab7d02f..bfa048dc01ec 100644
--- a/drivers/clk/qcom/a53-pll.c
+++ b/drivers/clk/qcom/a53-pll.c
@@ -15,7 +15,7 @@
#include "clk-pll.h"
#include "clk-regmap.h"
-static const struct pll_freq_tbl a53pll_freq[] = {
+static const struct pll_freq_tbl msm8916_freq[] = {
{ 998400000, 52, 0x0, 0x1, 0 },
{ 1094400000, 57, 0x0, 0x1, 0 },
{ 1152000000, 62, 0x0, 0x1, 0 },
@@ -43,8 +43,13 @@ static int qcom_a53pll_probe(struct platform_device *pdev)
void __iomem *base;
struct clk_init_data init = { };
const char *clk_name = NULL;
+ const struct pll_freq_tbl *freq_tbl;
int ret;
+ freq_tbl = device_get_match_data(&pdev->dev);
+ if (!freq_tbl)
+ return -ENODEV;
+
pll = devm_kzalloc(dev, sizeof(*pll), GFP_KERNEL);
if (!pll)
return -ENOMEM;
@@ -65,7 +70,7 @@ static int qcom_a53pll_probe(struct platform_device *pdev)
pll->mode_reg = 0x00;
pll->status_reg = 0x1c;
pll->status_bit = 16;
- pll->freq_tbl = a53pll_freq;
+ pll->freq_tbl = freq_tbl;
of_property_read_string(pdev->dev.of_node, "clock-output-names",
&clk_name);
@@ -92,7 +97,7 @@ static int qcom_a53pll_probe(struct platform_device *pdev)
}
static const struct of_device_id qcom_a53pll_match_table[] = {
- { .compatible = "qcom,msm8916-a53pll" },
+ { .compatible = "qcom,msm8916-a53pll", .data = msm8916_freq },
{ }
};
--
2.17.1
