On Thu, Apr 08, 2021 at 12:58:05PM -0400, Jim Quinlan wrote: > On Thu, Apr 8, 2021 at 12:20 PM Rob Herring <robh@xxxxxxxxxx> wrote: > > > > On Tue, Apr 06, 2021 at 02:25:49PM -0400, Jim Quinlan wrote: > > > On Tue, Apr 6, 2021 at 1:32 PM Mark Brown <broonie@xxxxxxxxxx> wrote: > > > > > > > > On Tue, Apr 06, 2021 at 01:26:51PM -0400, Jim Quinlan wrote: > > > > > On Tue, Apr 6, 2021 at 12:47 PM Mark Brown <broonie@xxxxxxxxxx> wrote: > > > > > > > > > > No great problem with having these in the controller node (assming it > > > > > > accurately describes the hardware) but I do think we ought to also be > > > > > > able to describe these per slot. > > > > PCIe is effectively point to point, so there's only 1 slot unless > > there's a PCIe switch in the middle. If that's the case, then it's all > > more complicated. > > > > > > > Can you explain what you think that would look like in the DT? > > > > > > > > I *think* that's just some properties on the nodes for the endpoints, > > > > note that the driver could just ignore them for now. Not sure where or > > > > if we document any extensions but child nodes are in section 4 of the > > > > v2.1 PCI bus binding. > > > > > > Hi Mark, > > > > > > I'm a little confused -- here is how I remember the chronology of the > > > "DT bindings" commit reviews, please correct me if I'm wrong: > > > > > > o JimQ submitted a pullreq for using voltage regulators in the same > > > style as the existing "rockport" PCIe driver. > > > o After some deliberation, RobH preferred that the voltage regulators > > > should go into the PCIe subnode device's DT node. > > > > IIRC, that's because you said there isn't a standard slot. > Admittedly, I'm not exactly sure what you mean by a "standard slot". > Our PCIIe HW does not support hotplug or have a presence bit or > anything like that. Our root complex has one port; it can only > directly connect to a single switch or endpoint. This connection shows > up as slot0. The voltage regulator(s) involved depend on a GPIO that > turns the power on/off for the connected device/chip. The gpio pin > can vary from board to board but this is easily handled in our DT. > Some boards have regulators that are always on and not associated with > a GPIO pin -- these have no representation in our DT. By standard slot, I mean you have standard voltage rails 12V and 3.3V (or 1.5 and 3.3 for mini PCIe) and PERST# signal, no other extra things to make a device discoverable, and the timing for those rails and PERST# follow what the spec defines. There's also CLKREQ, WAKE, and hotplug detect signals, but I think those are all optional and could be tied off. I think most PCI h/w is not hotplug capable. Rob
