On Thu, 2021-03-25 at 13:26 -0600, Robert Hancock wrote: > Various fixes and enhancements to the Si5341 driver. > > Changed since v2: > -changed regulator reference for output supply from vdd to vddo to match > data sheet > > Changed since v1: > -wait up to 300ms for DEVICE_READY > -use regmap_read_poll_timeout rather than fixed wait when waiting for PLL > lock and input presence > -make si5341_remove static > > Robert Hancock (9): > dt-bindings: clock: clk-si5341: Add new attributes > clk: si5341: Wait for DEVICE_READY on startup > clk: si5341: Avoid divide errors due to bogus register contents > clk: si5341: Check for input clock presence and PLL lock on startup > clk: si5341: Update initialization magic > clk: si5341: Allow different output VDD_SEL values > clk: si5341: Add silabs,xaxb-ext-clk property > clk: si5341: Add silabs,iovdd-33 property > clk: si5341: Add sysfs properties to allow checking/resetting device > faults > > .../bindings/clock/silabs,si5341.txt | 16 +- > drivers/clk/clk-si5341.c | 324 ++++++++++++++++-- > 2 files changed, 304 insertions(+), 36 deletions(-) > Ping.. any feedback on this patch set? (Aside from one ack on patch 1..) -- Robert Hancock Senior Hardware Designer, Calian Advanced Technologies www.calian.com
