On Mon, Mar 15, 2021 at 05:45:18PM +0530, Kuldeep Singh wrote: > Convert the Freescale DSPI binding to DT schema format using json-schema. > > Signed-off-by: Kuldeep Singh <kuldeep.singh@xxxxxxx> > --- > Hi Rob, > This patch is checked with following commands with no warnings observed. > make distclean; make allmodconfig; > make dt_binding_check DT_SCHEMA_FILES=Documentation/devicetree/bindings/spi/fsl,spi-fsl-dspi.yaml; > make dtbs_check DT_SCHEMA_FILES=Documentation/devicetree/bindings/spi/fsl,spi-fsl-dspi.yaml > > .../bindings/spi/fsl,spi-fsl-dspi.yaml | 131 ++++++++++++++++++ > .../devicetree/bindings/spi/spi-fsl-dspi.txt | 65 --------- > MAINTAINERS | 2 +- > 3 files changed, 132 insertions(+), 66 deletions(-) > create mode 100644 Documentation/devicetree/bindings/spi/fsl,spi-fsl-dspi.yaml > delete mode 100644 Documentation/devicetree/bindings/spi/spi-fsl-dspi.txt > > diff --git a/Documentation/devicetree/bindings/spi/fsl,spi-fsl-dspi.yaml b/Documentation/devicetree/bindings/spi/fsl,spi-fsl-dspi.yaml > new file mode 100644 > index 000000000000..15ffc83bdba6 > --- /dev/null > +++ b/Documentation/devicetree/bindings/spi/fsl,spi-fsl-dspi.yaml > @@ -0,0 +1,131 @@ > +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) > +%YAML 1.2 > +--- > +$id: http://devicetree.org/schemas/spi/fsl,spi-fsl-dspi.yaml# > +$schema: http://devicetree.org/meta-schemas/core.yaml# > + > +title: Freescale DSPI Controller > + > +maintainers: > + - Vladimir Oltean <olteanv@xxxxxxxxx> > + > +allOf: > + - $ref: "spi-controller.yaml#" > + > +properties: > + compatible: > + oneOf: > + - enum: > + - fsl,vf610-dspi > + - fsl,ls1021a-v1.0-dspi > + - fsl,ls1028a-dspi > + - fsl,ls2085a-dspi > + - fsl,lx2160a-dspi > + - items: > + - enum: > + - fsl,ls1012a-dspi > + - fsl,ls1028a-dspi > + - fsl,ls1043a-dspi > + - fsl,ls1046a-dspi > + - fsl,ls1088a-dspi > + - const: fsl,ls1021a-v1.0-dspi > + - items: > + - enum: > + - fsl,ls2080a-dspi > + - fsl,lx2160a-dspi > + - const: fsl,ls2085a-dspi > + > + reg: > + maxItems: 1 > + description: Offset and length of registers > + > + interrupts: > + maxItems: 1 > + > + clocks: > + items: > + - description: SoC dspi clock > + > + clock-names: > + items: > + - const: dspi > + > + pinctrl-names: > + minItems: 1 Implied by the length of 'items'. > + items: > + - const: default > + description: > + Names for the pin configuration must be "default" Just repeating what the schema says. Drop. > + > + dmas: > + maxItems: 2 > + > + dma-names: > + items: > + - const: tx > + - const: rx > + > + spi-num-chipselects: > + maxItems: 1 An array? This needs a type ref. > + description: Number of the chipselect signals > + > + bus-num: > + items: > + - description: Slave chip chipselect signal number An array? Also needs a type ref. > + > +patternProperties: > + "@[0-9a-f]+": > + type: object > + > + properties: > + fsl,spi-cs-sck-delay: > + description: > + Delay in nanoseconds between activating chip select and the start of > + clock signal, at the start of a transfer. > + $ref: /schemas/types.yaml#/definitions/uint32 > + > + fsl,spi-sck-cs-delay: > + description: > + Delay in nanoseconds between stopping the clock signal and > + deactivating chip select, at the end of a transfer. > + $ref: /schemas/types.yaml#/definitions/uint32 > + > +required: > + - compatible > + - reg > + - interrupts > + - clocks > + - clock-names > + - spi-num-chipselects > + > +unevaluatedProperties: false > + > +examples: > + - | > + #include <dt-bindings/clock/fsl,qoriq-clockgen.h> > + #include <dt-bindings/interrupt-controller/arm-gic.h> > + > + soc { > + #address-cells = <2>; > + #size-cells = <2>; > + > + spi@2100000 { > + compatible = "fsl,ls1028a-dspi", "fsl,ls1021a-v1.0-dspi"; > + #address-cells = <1>; > + #size-cells = <0>; > + reg = <0x0 0x2100000 0x0 0x10000>; > + interrupts = <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>; > + clock-names = "dspi"; > + clocks = <&clockgen QORIQ_CLK_PLATFORM_PLL QORIQ_CLK_PLL_DIV(2)>; > + dmas = <&edma0 0 62>, <&edma0 0 60>; > + dma-names = "tx", "rx"; > + spi-num-chipselects = <4>; > + little-endian; > + > + flash@0 { > + compatible = "jedec,spi-nor"; > + spi-max-frequency = <10000000>; > + reg = <0>; > + }; > + }; > + }; > diff --git a/Documentation/devicetree/bindings/spi/spi-fsl-dspi.txt b/Documentation/devicetree/bindings/spi/spi-fsl-dspi.txt > deleted file mode 100644 > index 30a79da9c039..000000000000 > --- a/Documentation/devicetree/bindings/spi/spi-fsl-dspi.txt > +++ /dev/null > @@ -1,65 +0,0 @@ > -ARM Freescale DSPI controller > - > -Required properties: > -- compatible : must be one of: > - "fsl,vf610-dspi", > - "fsl,ls1021a-v1.0-dspi", > - "fsl,ls1012a-dspi" (optionally followed by "fsl,ls1021a-v1.0-dspi"), > - "fsl,ls1028a-dspi", > - "fsl,ls1043a-dspi" (optionally followed by "fsl,ls1021a-v1.0-dspi"), > - "fsl,ls1046a-dspi" (optionally followed by "fsl,ls1021a-v1.0-dspi"), > - "fsl,ls1088a-dspi" (optionally followed by "fsl,ls1021a-v1.0-dspi"), > - "fsl,ls2080a-dspi" (optionally followed by "fsl,ls2085a-dspi"), > - "fsl,ls2085a-dspi", > - "fsl,lx2160a-dspi", > -- reg : Offset and length of the register set for the device > -- interrupts : Should contain SPI controller interrupt > -- clocks: from common clock binding: handle to dspi clock. > -- clock-names: from common clock binding: Shall be "dspi". > -- pinctrl-0: pin control group to be used for this controller. > -- pinctrl-names: must contain a "default" entry. > -- spi-num-chipselects : the number of the chipselect signals. > - > -Optional property: > -- big-endian: If present the dspi device's registers are implemented > - in big endian mode. > -- bus-num : the slave chip chipselect signal number. > - > -Optional SPI slave node properties: > -- fsl,spi-cs-sck-delay: a delay in nanoseconds between activating chip > - select and the start of clock signal, at the start of a transfer. > -- fsl,spi-sck-cs-delay: a delay in nanoseconds between stopping the clock > - signal and deactivating chip select, at the end of a transfer. > - > -Example: > - > -dspi0@4002c000 { > - #address-cells = <1>; > - #size-cells = <0>; > - compatible = "fsl,vf610-dspi"; > - reg = <0x4002c000 0x1000>; > - interrupts = <0 67 0x04>; > - clocks = <&clks VF610_CLK_DSPI0>; > - clock-names = "dspi"; > - spi-num-chipselects = <5>; > - bus-num = <0>; > - pinctrl-names = "default"; > - pinctrl-0 = <&pinctrl_dspi0_1>; > - big-endian; > - > - sflash: at26df081a@0 { > - #address-cells = <1>; > - #size-cells = <1>; > - compatible = "atmel,at26df081a"; > - spi-max-frequency = <16000000>; > - spi-cpol; > - spi-cpha; > - reg = <0>; > - linux,modalias = "m25p80"; > - modal = "at26df081a"; > - fsl,spi-cs-sck-delay = <100>; > - fsl,spi-sck-cs-delay = <50>; > - }; > -}; > - > - > diff --git a/MAINTAINERS b/MAINTAINERS > index d92f85ca831d..e2c5b7367db9 100644 > --- a/MAINTAINERS > +++ b/MAINTAINERS > @@ -7060,7 +7060,7 @@ FREESCALE DSPI DRIVER > M: Vladimir Oltean <olteanv@xxxxxxxxx> > L: linux-spi@xxxxxxxxxxxxxxx > S: Maintained > -F: Documentation/devicetree/bindings/spi/spi-fsl-dspi.txt > +F: Documentation/devicetree/bindings/spi/fsl,spi-fsl-dspi.yaml > F: drivers/spi/spi-fsl-dspi.c > F: include/linux/spi/spi-fsl-dspi.h > > -- > 2.17.1 >
