On Wed, Mar 24, 2021 at 01:39:32PM +0100, Thierry Reding wrote: > On Fri, Feb 05, 2021 at 05:22:29PM +0100, Greg KH wrote: > > On Fri, Feb 05, 2021 at 05:15:21PM +0100, Thierry Reding wrote: > > > On Wed, Jan 20, 2021 at 03:34:00PM +0800, JC Kuo wrote: > > > > Tegra XHCI controler can be placed in ELPG (Engine Level PowerGated) > > > > state for power saving when all of the connected USB devices are in > > > > suspended state. This patch series includes clk, phy and pmc changes > > > > that are required for properly place controller in ELPG and bring > > > > controller out of ELPG. > > > > > > > > JC Kuo (14): > > > > clk: tegra: Add PLLE HW power sequencer control > > > > clk: tegra: Don't enable PLLE HW sequencer at init > > > > phy: tegra: xusb: Move usb3 port init for Tegra210 > > > > phy: tegra: xusb: Rearrange UPHY init on Tegra210 > > > > phy: tegra: xusb: Add Tegra210 lane_iddq operation > > > > phy: tegra: xusb: Add sleepwalk and suspend/resume > > > > soc/tegra: pmc: Provide USB sleepwalk register map > > > > arm64: tegra210: XUSB PADCTL add "nvidia,pmc" prop > > > > dt-bindings: phy: tegra-xusb: Add nvidia,pmc prop > > > > phy: tegra: xusb: Add wake/sleepwalk for Tegra210 > > > > phy: tegra: xusb: Tegra210 host mode VBUS control > > > > phy: tegra: xusb: Add wake/sleepwalk for Tegra186 > > > > usb: host: xhci-tegra: Unlink power domain devices > > > > xhci: tegra: Enable ELPG for runtime/system PM > > > > > > > > .../phy/nvidia,tegra124-xusb-padctl.txt | 1 + > > > > arch/arm64/boot/dts/nvidia/tegra210.dtsi | 1 + > > > > drivers/clk/tegra/clk-pll.c | 12 - > > > > drivers/clk/tegra/clk-tegra210.c | 53 +- > > > > drivers/phy/tegra/xusb-tegra186.c | 558 ++++- > > > > drivers/phy/tegra/xusb-tegra210.c | 1889 +++++++++++++---- > > > > drivers/phy/tegra/xusb.c | 92 +- > > > > drivers/phy/tegra/xusb.h | 22 +- > > > > drivers/soc/tegra/pmc.c | 94 + > > > > drivers/usb/host/xhci-tegra.c | 613 ++++-- > > > > include/linux/clk/tegra.h | 4 +- > > > > include/linux/phy/tegra/xusb.h | 10 +- > > > > 12 files changed, 2784 insertions(+), 565 deletions(-) > > > > > > > > v5 "phy: tegra: xusb: tegra210: Do not reset UPHY PLL" is moved > > > > into v6 "phy: tegra: xusb: Rearrange UPHY init on Tegra210" > > > > > > Mike, Stephen, > > > > > > could you guys take a look at the two clk patches here and give an > > > Acked-by? There's build-time dependencies throughout the series, so it'd > > > be good if they can all go through either the PHY or USB trees. > > > > > > Kishon, Greg, > > > > > > any comments on these patches? Unfortunately, the USB patches in this > > > series have a build-time dependency on the PHY patches, so this should > > > all go through one tree. Since this all culminates in the XHCI driver, > > > merging this through the USB tree might be best, provided that Kishon > > > provides his Acked-by on the PHY patches. > > > > > > Alternatively, I can create a set of branches with the correct > > > dependencies and send out pull requests for the three subsystems if > > > that's preferrable. > > > > I have no objection for the usb patches to go through your tree as they > > are hardware-specific. > > Kishon, > > I haven't heard back from you on this yet. We missed v5.12 but I'd like > to get this into v5.13 since it's the last missing piece to get suspend > and resume working properly on a number of boards. > > Are you okay if I take this through the Tegra tree to satisfy the > interdependencies between clk, PHY and USB patches? I've already got > Acked-by's from the clock and USB maintainers. > > I want to tentatively take this into linux-next to give it a bit of soak > time before the ARM SoC -rc6 cut-off. Please let me know if you'd prefer > to apply these to your tree so I can back them out of the Tegra tree > again. Also adding Vinod for visibility and in case Kishon's too busy. Thierry
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