> -----Original Message----- > From: Shawn Guo <shawnguo@xxxxxxxxxx> > Sent: 2021年3月18日 18:48 > To: Joakim Zhang <qiangqing.zhang@xxxxxxx> > Cc: robh+dt@xxxxxxxxxx; s.hauer@xxxxxxxxxxxxxx; festevam@xxxxxxxxx; > kernel@xxxxxxxxxxxxxx; dl-linux-imx <linux-imx@xxxxxxx>; > devicetree@xxxxxxxxxxxxxxx; linux-arm-kernel@xxxxxxxxxxxxxxxxxxx; > linux-kernel@xxxxxxxxxxxxxxx > Subject: Re: [PATCH V1] arm64: dts: imx8mp: fix FEC can't work when attached > to generic phy driver > > On Thu, Mar 04, 2021 at 07:40:13PM +0800, Joakim Zhang wrote: > > Some users report that FEC can't work on i.MX8MP EVK board, it brings > > inconvenience. The root cause should be FEC controller attached to > > generic phy driver, as Realtek phy driver is built as module in the > > defconfig file (CONFIG_REALTEK_PHY=m), so it is unavailable. If > > provide "reset-gpios" property, it will reset phy when probed, and no > > way to re-config phy since we use the generic phy dirver, which leads > > FEC can't work. > > > > There are two ways to let FEC work: > > > > 1. If you want to use generic phy dirver, please delete "reset-gpios" > > property, keep power-on strapping pins configurations. > > > > 2. If you want to use Realtek phy driver, please buildin driver > > (CONFIG_REALTEK_PHY=y), and had better add another two reset > > properties: > > reset-assert-us = <20000>; > > reset-deassert-us = <150000>; > > According to RTL8211 serials PHY datasheet, for a complete PHY reset, > > reset pin must be asserted low for at least 10ms for internal regulator. > > Wait for at least 72ms (for internal circuits settling time) before > > accessing the PHY register. > > > > This patch selects method 1, since users may waste time to find out > > FEC failure, in most cases, they just want to use networking to debug > > other modules. > > > > Fixs: commit 9e847693c6f34 ("arm64: dts: freescale: Add i.MX8MP EVK > > board support") > > Signed-off-by: Joakim Zhang <qiangqing.zhang@xxxxxxx> > > --- > > arch/arm64/boot/dts/freescale/imx8mp-evk.dts | 1 - > > 1 file changed, 1 deletion(-) > > > > diff --git a/arch/arm64/boot/dts/freescale/imx8mp-evk.dts > > b/arch/arm64/boot/dts/freescale/imx8mp-evk.dts > > index 7db4273cc88b..4f5c2fb33eda 100644 > > --- a/arch/arm64/boot/dts/freescale/imx8mp-evk.dts > > +++ b/arch/arm64/boot/dts/freescale/imx8mp-evk.dts > > @@ -97,7 +97,6 @@ > > compatible = "ethernet-phy-ieee802.3-c22"; > > reg = <1>; > > eee-broken-1000t; > > - reset-gpios = <&gpio4 2 GPIO_ACTIVE_LOW>; > > Hmm, DT is describing hardware. If board schematic says there is a reset > GPIO, we should have it. Hi Shawn, Seems you prefer to 2, is it possible to buildin Realtek PHY(CONFIG_REALTEK_PHY=y)? If not, it is going to be tricky. Best Regards, Joakim Zhang > Shawn > > > }; > > }; > > }; > > -- > > 2.17.1 > >