On Tue, 02 Mar 2021 10:28:45 +0000, Claudiu Beznea <claudiu.beznea@xxxxxxxxxxxxx> wrote: > > Add DT bindings for Microchip External Interrupt Controller. > > Signed-off-by: Claudiu Beznea <claudiu.beznea@xxxxxxxxxxxxx> > --- > .../interrupt-controller/mchp,eic.yaml | 74 +++++++++++++++++++ > 1 file changed, 74 insertions(+) > create mode 100644 Documentation/devicetree/bindings/interrupt-controller/mchp,eic.yaml > > diff --git a/Documentation/devicetree/bindings/interrupt-controller/mchp,eic.yaml b/Documentation/devicetree/bindings/interrupt-controller/mchp,eic.yaml > new file mode 100644 > index 000000000000..5a927817aa7d > --- /dev/null > +++ b/Documentation/devicetree/bindings/interrupt-controller/mchp,eic.yaml > @@ -0,0 +1,74 @@ > +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) > +%YAML 1.2 > +--- > +$id: http://devicetree.org/schemas/interrupt-controller/mchp,eic.yaml# > +$schema: http://devicetree.org/meta-schemas/core.yaml# > + > +title: Microchip External Interrupt Controller > + > +maintainers: > + - Claudiu Beznea <claudiu.beznea@xxxxxxxxxxxxx> > + > +description: > + This interrupt controller is found in Microchip SoCs (SAMA7G5) and provides > + support for handling up to 2 external interrupt lines. > + > +properties: > + compatible: > + enum: > + - microchip,sama7g5-eic > + > + reg: > + maxItems: 1 > + > + interrupt-controller: true > + > + '#interrupt-cells': > + const: 3 > + description: > + The first cell is the input IRQ number (between 0 and 1), the second cell > + is the trigger type as defined in interrupt.txt present in this directory > + and the third cell is the glitch filter (1, 2, 4, 8) in clock cycles This last parameter looks like a very bad idea. How do you plan for that to be used? Which clock cycles? In any case, I don't think it should be part of the interrupt descriptor, but provided as a static configuration at the interrupt controller level itself. Thanks, M. -- Without deviation from the norm, progress is not possible.
