From: Konstantin Porotchkin <kostap@xxxxxxxxxxx>
Add SDIO mode pin control configuration for CP0 in Armada
70x0 and 80x0 SoCs.
Signed-off-by: Konstantin Porotchkin <kostap@xxxxxxxxxxx>
---
arch/arm64/boot/dts/marvell/armada-70x0.dtsi | 6 ++++++
arch/arm64/boot/dts/marvell/armada-80x0.dtsi | 6 ++++++
2 files changed, 12 insertions(+)
diff --git a/arch/arm64/boot/dts/marvell/armada-70x0.dtsi b/arch/arm64/boot/dts/marvell/armada-70x0.dtsi
index 293403a1a333..f22b6b8f5086 100644
--- a/arch/arm64/boot/dts/marvell/armada-70x0.dtsi
+++ b/arch/arm64/boot/dts/marvell/armada-70x0.dtsi
@@ -47,6 +47,12 @@
cp0_pinctrl: pinctrl {
compatible = "marvell,armada-7k-pinctrl";
+ sdhci_pins: sdhci-pins {
+ marvell,pins = "mpp56", "mpp57", "mpp58",
+ "mpp59", "mpp60", "mpp61", "mpp62";
+ marvell,function = "sdio";
+ };
+
nand_pins: nand-pins {
marvell,pins =
"mpp15", "mpp16", "mpp17", "mpp18",
diff --git a/arch/arm64/boot/dts/marvell/armada-80x0.dtsi b/arch/arm64/boot/dts/marvell/armada-80x0.dtsi
index ee67c70bf02e..04a6142a0286 100644
--- a/arch/arm64/boot/dts/marvell/armada-80x0.dtsi
+++ b/arch/arm64/boot/dts/marvell/armada-80x0.dtsi
@@ -70,6 +70,12 @@
&cp0_syscon0 {
cp0_pinctrl: pinctrl {
compatible = "marvell,armada-8k-cpm-pinctrl";
+
+ sdhci_pins: sdhci-pins {
+ marvell,pins = "mpp56", "mpp57", "mpp58",
+ "mpp59", "mpp60", "mpp61", "mpp62";
+ marvell,function = "sdio";
+ };
};
};
--
2.17.1
