On Mon, Jan 25, 2021 at 08:52:01AM +0100, Michal Simek wrote: > > > >> > >> Long time ago we said that we are not going to push any PL related > >> configurations. It means all below can't be merged. > >> And there are also coding style issues. > > > > You'll need to explain this more. It's likely this was added at the suggestion of > > Xilinx. If it can't be upstreamed what should we replace it with ? > > No idea who gave you this suggestion from Xilinx. Just an FYI , I didn't write this dts or work on it's original development so I can't name names. > I had similar thread with Michael Walle about supporting Ebang board. > PL depends on your custom design and can change quite quickly that's > there is no good/bad configuration. That's why all of them can be valid > and kernel is not the right location to store thousands of > configurations (likely in overlay form). That's why only fixed > configurations for PS are added to kernel. > And I prefer if there is any good reason behind why these platforms > should be added. I'm not sure what your talking about above .. Are you suggesting the changes in my DTS will change quickly ? They have been the same for years , we don't plan to change them. This DTS is not a prototype it's a released Cisco product. If I did delete this "PL configuration" where would you expect it to re-appear ? Typically things which aren't upstreamable are transformed into something else, it's rare that something is just removed and has no transformation. Daniel
