On Thu, Jan 14, 2021 at 11:27:00PM +0800, Muhammad Husaini Zulkifli wrote:
> Keem Bay SOC can support dual voltage operations for GPIO SD pins to
> either 1.8V or 3.3V for bus IO line power. In order to operate the GPIOs
> line for Clk, Cmd and Data on Keem Bay hardware, it is important to
> configure the supplied voltage applied to their I/O Rail and the output
> of the I²C expander pin. Final Voltage applied on the GPIOs line are
> dependent by both supplied voltage rail and expander pin output as it is
> been set after passing through the voltage sense resistor.
>
> Keem Bay hardware is somewhat unique in the way of how IO bus line
> voltage are been controlled.
>
> Expander pin output is controlled by gpio-regulator. Voltage rail output
> is controlled by Keem Bay SD regulator. Keem Bay SD regulator encapsulated
> the Secure Monitor Calling Convention (SMCCC) to communicate with Trusted
> Firmware during set voltage operation.
>
> Signed-off-by: Muhammad Husaini Zulkifli <muhammad.husaini.zulkifli@xxxxxxxxx>
> Acked-by: Adrian Hunter <adrian.hunter@xxxxxxxxx>
> Acked-by: Andy Shevchenko <andriy.shevchenko@xxxxxxxxx>
> ---
> drivers/mmc/host/sdhci-of-arasan.c | 263 +++++++++++++++++++++++++++++
> 1 file changed, 263 insertions(+)
> + u32 otap_delay, sel_clk_buffer;
> +
> + phys = of_parse_phandle(dev->of_node, "phys", 0);
Normally, you'd use the phy API here. Though not required from a DT
perspective.
> + if (!phys) {
> + dev_err(dev, "Can't get phys for sd0\n");
> + return -ENODEV;
> + }
> +
> + of_property_read_u32(phys, "intel,keembay-emmc-phy-otap-dly", &otap_delay);
> + of_property_read_u32(phys, "intel,keembay-emmc-phy-sel-clkbuf", &sel_clk_buffer);
Not doucmented?
For property names, I'd leave out the SoC name. Might want to use it in
the next chip.
Rob
