On Wed, Jan 20, 2021 at 02:43:49PM +0100, Robert Foss wrote: > Add bindings for qcom,msm8996-camss in order to support the camera > subsystem on MSM8996. > > Signed-off-by: Robert Foss <robert.foss@xxxxxxxxxx> > --- > > Changes since v1: > - Laurent: Reworked driver to use dtschema > > > .../bindings/media/qcom,msm8996-camss.yaml | 418 ++++++++++++++++++ > 1 file changed, 418 insertions(+) > create mode 100644 Documentation/devicetree/bindings/media/qcom,msm8996-camss.yaml > > diff --git a/Documentation/devicetree/bindings/media/qcom,msm8996-camss.yaml b/Documentation/devicetree/bindings/media/qcom,msm8996-camss.yaml > new file mode 100644 > index 000000000000..5ca0be8892ab > --- /dev/null > +++ b/Documentation/devicetree/bindings/media/qcom,msm8996-camss.yaml > @@ -0,0 +1,418 @@ > +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) > + > +%YAML 1.2 > +--- > +$id: "http://devicetree.org/schemas/media/qcom,msm8996-camss.yaml#"; > +$schema: "http://devicetree.org/meta-schemas/core.yaml#"; > + > +title: Qualcomm CAMSS ISP > + > +maintainers: > + - Robert Foss <robert.foss@xxxxxxxxxx> > + - Todor Tomov <todor.too@xxxxxxxxx> > + > +description: | > + The CAMSS IP is a CSI decoder and ISP present on Qualcomm platforms > + > +properties: > + compatible: > + const: qcom,msm8996-camss > + > + clocks: > + description: > + Input clocks for the hardware block. That's every 'clocks' entry. Drop. > + minItems: 36 > + maxItems: 36 > + > + clock-names: > + description: > + Names of input clocks for the hardware block. ditto. > + items: > + - const: top_ahb > + - const: ispif_ahb > + - const: csiphy0_timer > + - const: csiphy1_timer > + - const: csiphy2_timer > + - const: csi0_ahb > + - const: csi0 > + - const: csi0_phy > + - const: csi0_pix > + - const: csi0_rdi > + - const: csi1_ahb > + - const: csi1 > + - const: csi1_phy > + - const: csi1_pix > + - const: csi1_rdi > + - const: csi2_ahb > + - const: csi2 > + - const: csi2_phy > + - const: csi2_pix > + - const: csi2_rdi > + - const: csi3_ahb > + - const: csi3 > + - const: csi3_phy > + - const: csi3_pix > + - const: csi3_rdi > + - const: ahb > + - const: vfe0 > + - const: csi_vfe0 > + - const: vfe0_ahb > + - const: vfe0_stream > + - const: vfe1 > + - const: csi_vfe1 > + - const: vfe1_ahb > + - const: vfe1_stream > + - const: vfe_ahb > + - const: vfe_axi > + > + interrupts: > + description: > + IRQs for the hardware block. ditto > + minItems: 10 > + maxItems: 10 > + > + interrupt-names: > + description: > + Names of IRQs for the hardware block. > + items: > + - const: csiphy0 > + - const: csiphy1 > + - const: csiphy2 > + - const: csid0 > + - const: csid1 > + - const: csid2 > + - const: csid3 > + - const: ispif > + - const: vfe0 > + - const: vfe1 > + > + iommus: > + maxItems: 4 > + > + power-domains: > + maxItems: 2 Need to define what each one is. items: - description: ... - description: ... > + > + ports: This needs to reference graph.yaml#/properties/ports See recent additions in -next. > + description: > + The CSI data input ports. > + > + type: object > + > + properties: > + port@0: There's a pending video-interfaces.yaml conversion which this is going to need to use[1]. > + type: object > + description: Input node for receiving CSI data. > + properties: > + endpoint: > + type: object > + > + properties: > + clock-lanes: > + description: |- > + The physical clock lane index. The value must > + always be <7> as the hardware supports D-PHY > + and C-PHY, indexes are in a common set and > + D-PHY physical clock lane is labeled as 7. You don't need this in DT if it can only be 1 value. > + > + data-lanes: > + description: |- > + An array of physical data lanes indexes. > + Position of an entry determines the logical > + lane number, while the value of an entry > + indicates physical lane index. Lane swapping > + is supported. Physical lane indexes are: > + 0, 1, 2, 3 No need to redescribe this here. Just any additional constraints. 'maxItems: 4' at least since the base allows 8. Rob [1] https://lore.kernel.org/linux-devicetree/20210104165808.2166686-1-robh@xxxxxxxxxx/
