Hi, Yongqiang:
Yongqiang Niu <yongqiang.niu@xxxxxxxxxxxx> 於 2021年1月7日 週四 上午11:11寫道：
>
> rdma fifo size may be different even in same SOC, add this
> property to the corresponding rdma
Reviewed-by: Chun-Kuang Hu <chunkuang.hu@xxxxxxxxxx>
>
> Signed-off-by: Yongqiang Niu <yongqiang.niu@xxxxxxxxxxxx>
> ---
> .../devicetree/bindings/display/mediatek/mediatek,disp.txt | 9 +++++++++
> 1 file changed, 9 insertions(+)
>
> diff --git a/Documentation/devicetree/bindings/display/mediatek/mediatek,disp.txt b/Documentation/devicetree/bindings/display/mediatek/mediatek,disp.txt
> index 33977e1..b07881e 100644
> --- a/Documentation/devicetree/bindings/display/mediatek/mediatek,disp.txt
> +++ b/Documentation/devicetree/bindings/display/mediatek/mediatek,disp.txt
> @@ -66,6 +66,14 @@ Required properties (DMA function blocks):
> argument, see Documentation/devicetree/bindings/iommu/mediatek,iommu.txt
> for details.
>
> +Optional properties (RDMA function blocks):
> +- mediatek,rdma-fifo-size: rdma fifo size may be different even in same SOC, add this
> + property to the corresponding rdma
> + the value is the Max value which defined in hardware data sheet.
> + mediatek,rdma-fifo-size of mt8173-rdma0 is 8K
> + mediatek,rdma-fifo-size of mt8183-rdma0 is 5K
> + mediatek,rdma-fifo-size of mt8183-rdma1 is 2K
> +
> Examples:
>
> mmsys: clock-controller@14000000 {
> @@ -103,6 +111,7 @@ rdma0: rdma@1400e000 {
> clocks = <&mmsys CLK_MM_DISP_RDMA0>;
> iommus = <&iommu M4U_PORT_DISP_RDMA0>;
> mediatek,larb = <&larb0>;
> + mediatek,rdma-fifosize = <8192>;
> };
>
> rdma1: rdma@1400f000 {
> --
> 1.8.1.1.dirty
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