Signed-off-by: Roger Lu <roger.lu@xxxxxxxxxxxx>
---
.../bindings/soc/mediatek/mtk-svs.yaml | 26 +++++++++++++++++++
1 file changed, 26 insertions(+)
diff --git a/Documentation/devicetree/bindings/soc/mediatek/mtk-svs.yaml b/Documentation/devicetree/bindings/soc/mediatek/mtk-svs.yaml
index 9c7da0acd82f..9310109d209a 100644
--- a/Documentation/devicetree/bindings/soc/mediatek/mtk-svs.yaml
+++ b/Documentation/devicetree/bindings/soc/mediatek/mtk-svs.yaml
@@ -22,6 +22,7 @@ properties:
compatible:
enum:
- mediatek,mt8183-svs
+ - mediatek,mt8192-svs
reg:
description: Address range of the MTK SVS controller.
@@ -47,6 +48,14 @@ properties:
- const: svs-calibration-data
- const: t-calibration-data
+ resets:
+ description:
+ svs reset control.
+
+ reset-names:
+ items:
+ - const: svs_rst
+
required:
- compatible
- reg
@@ -73,3 +82,20 @@ examples:
nvmem-cells = <&svs_calibration>, <&thermal_calibration>;
nvmem-cell-names = "svs-calibration-data", "t-calibration-data";
};
+
+ - |
+ #include <dt-bindings/clock/mt8192-clk.h>
+ #include <dt-bindings/interrupt-controller/arm-gic.h>
+ #include <dt-bindings/interrupt-controller/irq.h>
+
+ svs: svs@1100b000 {
+ compatible = "mediatek,mt8192-svs";
+ reg = <0 0x1100b000 0 0x1000>;
+ interrupts = <GIC_SPI 167 IRQ_TYPE_LEVEL_HIGH 0>;
+ clocks = <&infracfg CLK_INFRA_THERM>;
+ clock-names = "main";
+ nvmem-cells = <&svs_calibration>, <&lvts_e_data1>;
+ nvmem-cell-names = "svs-calibration-data", "t-calibration-data";
+ resets = <&infracfg_rst 0>;
+ reset-names = "svs_rst";
+ };
--
2.18.0
