On Mon, 7 Dec 2020 18:57:59 +0100, Stefan Agner wrote:
> According to the datasheet (Rev. 1.9) the RTL8211F requires at least
> 72ms "for internal circuits settling time" before accessing the PHY
> registers. This fixes an issue where the Ethernet link doesn't come up
> when using ip link set down/up:
> [ 29.360965] meson8b-dwmac ff3f0000.ethernet eth0: Link is Down
> [ 34.569012] meson8b-dwmac ff3f0000.ethernet eth0: PHY [0.0:00] driver [RTL8211F Gigabit Ethernet] (irq=31)
> [ 34.676732] meson8b-dwmac ff3f0000.ethernet: Failed to reset the dma
> [ 34.678874] meson8b-dwmac ff3f0000.ethernet eth0: stmmac_hw_setup: DMA engine initialization failed
> [ 34.687850] meson8b-dwmac ff3f0000.ethernet eth0: stmmac_open: Hw setup failed
Applied, thanks!
[1/5] arm64: dts: meson: g12b: odroid-n2: fix PHY deassert timing requirements
commit: 1c7412530d5d0e0a0b27f1642f5c13c8b9f36f05
[2/5] arm64: dts: meson: fix PHY deassert timing requirements
commit: c183c406c4321002fe85b345b51bc1a3a04b6d33
[3/5] ARM: dts: meson: fix PHY deassert timing requirements
commit: 656ab1bdcd2b755dc161a9774201100d5bf74b8d
[4/5] arm64: dts: meson: g12a: x96-max: fix PHY deassert timing requirements
commit: 3d07c3b3a886fefd583c1b485b5e4e3c4e2da493
[5/5] arm64: dts: meson: g12b: w400: fix PHY deassert timing requirements
commit: 9e454e37dc7c0ee9e108d70b983e7a71332aedff
Best regards,
--
Kevin Hilman <khilman@xxxxxxxxxxxx>
