Hi Daniel
Defined per-core thermal zone in DTS file as the following. thanks
prometheus6_tzone0: prometheus6-tzone0 {
polling-delay-passive = <0>;
polling-delay = <0>;
thermal-sensors = <&ap_thm0 0>;
};
prometheus6_tzone1: prometheus6-tzone1 {
polling-delay-passive = <0>;
polling-delay = <0>;
thermal-sensors = <&ap_thm0 1>;
};
prometheus7_thmzone: prometheus7-thmzone {
polling-delay-passive = <0>;
polling-delay = <0>;
thermal-sensors = <&ap_thm0 2>;
};
ank0_thmzone: ank0-thmzone {
polling-delay-passive = <0>;
polling-delay = <0>;
thermal-sensors = <&ap_thm0 3>;
};
ank1_thmzone: ank1-thmzone {
polling-delay-passive = <0>;
polling-delay = <0>;
thermal-sensors = <&ap_thm0 4>;
};
gpu_thmzone: gpu-thmzone {
polling-delay-passive = <0>;
polling-delay = <0>;
thermal-sensors = <&ap_thm1 0>;
};
ank2_thmzone: ank2-thmzone {
polling-delay-passive = <0>;
polling-delay = <0>;
thermal-sensors = <&ap_thm1 1>;
};
ank3_thmzone: ank3-thmzone {
polling-delay-passive = <0>;
polling-delay = <0>;
thermal-sensors = <&ap_thm1 2>;
};
ank4_thmzone: ank4-thmzone {
polling-delay-passive = <0>;
polling-delay = <0>;
thermal-sensors = <&ap_thm1 3>;
};
ank5_thmzone: ank5-thmzone {
polling-delay-passive = <0>;
polling-delay = <0>;
thermal-sensors = <&ap_thm1 4>;
};
cputop_thmzone: cputop-thmzone {
polling-delay-passive = <0>;
polling-delay = <0>;
thermal-sensors = <&ap_thm1 5>;
};
gpuank2_thmzone: gpuank2-thmzone {
polling-delay-passive = <0>;
polling-delay = <0>;
thermal-sensors = <&ap_thm2 0>;
};
On 30/11/2020, Daniel Lezcano <daniel.lezcano@xxxxxxxxxx> wrote:
> On 30/11/2020 10:03, gao yunxiao wrote:
>> Hi Daniel
>>
>> Thank you for your the new information
>>
>> I have a question trouble to you
>> We should choose which per-core thermal zone as the IPA's input
>> reference temperature in the current kernel version? thank you.
>
> Can you give a pointer to a DT describing your hardware ?
>
>
>
>> On 27/11/2020, Lukasz Luba <lukasz.luba@xxxxxxx> wrote:
>>>
>>>
>>> On 11/27/20 1:26 PM, Daniel Lezcano wrote:
>>>>
>>>> Hi Lukasz,
>>>>
>>>> On 27/11/2020 10:27, Lukasz Luba wrote:
>>>>>
>>>>>
>>>>> On 11/27/20 8:35 AM, gao.yunxiao6@xxxxxxxxx wrote:
>>>>>> From: "jeson.gao" <jeson.gao@xxxxxxxxxx>
>>>>>>
>>>>>> virtual thermal node definition description in dts file
>>>>>>
>>>>>> Signed-off-by: jeson.gao <jeson.gao@xxxxxxxxxx>
>>>>>> ---
>>>>
>>>> [ ... ]
>>>>
>>>>> It's coming back. There were attempts to solve this problem.
>>>>> Javi tried to solved this using hierarchical thermal zones [1].
>>>>> It was even agreed (IIRC during LPC) but couldn't continue. Then
>>>>> Eduardo
>>>>> was going to continue this (last message at [3]). Unfortunately,
>>>>> development stopped.
>>>>>
>>>>> I also have out-of-tree similar implementation for my Odroid-xu4,
>>>>> which does no have an 'SoC' sensor, but have CPU sensors and needs
>>>>> some aggregation function to get temperature.
>>>>>
>>>>> I can pick up Javi's patches and continue 'hierarchical thermal zones'
>>>>> approach.
>>>>>
>>>>> Javi, Daniel, Rui what do you think?
>>>>
>>>> I already worked on the hierarchical thermal zones and my opinion is
>>>> that fits not really well.
>>>>
>>>> We want to define a new feature because the thermal framework is built
>>>> on the 1:1 relationship between a governor and a thermal zone.
>>>>
>>>> Practically speaking, we want to mitigate two thermal zones from one
>>>> governor, especially here the IPA governor.
>>>>
>>>> The DTPM framework is being implemented to solve that by providing an
>>>> automatic power rebalancing between the power manageable capable
>>>> devices.
>>>>
>>>> In our case, the IPA would stick on the 'sustainable-power' resulting
>>>> on
>>>> the aggregation of the two performance domains and set the power limit
>>>> on the parent node. The automatic power rebalancing will ensure maximum
>>>> throughput between the two performance domains instead of capping the
>>>> whole.
>>>>
>>>>
>>>
>>> Make sense. Thank you for sharing valuable opinion.
>>>
>>> Regards,
>>> Lukasz
>>>
>
>
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