Hello, This series adds NAND controller support for SDX55 platform. SDX55 uses QPIC IP v2 which slightly differs from the former ones. The difference in the driver is handled by using 'qpic_v2' flag. The major difference in QPIC IP v2 is the DEV_CMD* registers which got moved to operational state, and access to them seems restricted. So in the driver, access to DEV_CMD* registers is excluded. For reading the ONFI parameters, a separate field 'OP_PAGE_READ_ONFI_READ' in 'NAND_FLASH_CMD' register is used. This series has been tested on SDX55 MTP along with the SMEM partition parser [1]. Thanks, Mani [1] https://lore.kernel.org/patchwork/cover/1340600/ Manivannan Sadhasivam (2): dt-bindings: qcom_nandc: Add SDX55 QPIC NAND documentation mtd: rawnand: qcom: Add NAND controller support for SDX55 .../devicetree/bindings/mtd/qcom_nandc.txt | 2 + drivers/mtd/nand/raw/qcom_nandc.c | 68 ++++++++++++++----- 2 files changed, 53 insertions(+), 17 deletions(-) -- 2.25.1
