On 2020/11/20 2:05, conor.dooley@xxxxxxxxxxxxx wrote: > From: Conor Dooley <conor.dooley@xxxxxxxxxxxxx> > > Add device tree bindings for the MSS system controller mailbox on > the Microchip PolarFire SoC. > > Signed-off-by: Conor Dooley <conor.dooley@xxxxxxxxxxxxx> > --- > .../mailbox/microchip,mpfs-mailbox.yaml | 46 +++++++++++++++++++ > 1 file changed, 46 insertions(+) > create mode 100644 Documentation/devicetree/bindings/mailbox/microchip,mpfs-mailbox.yaml > > diff --git a/Documentation/devicetree/bindings/mailbox/microchip,mpfs-mailbox.yaml b/Documentation/devicetree/bindings/mailbox/microchip,mpfs-mailbox.yaml > new file mode 100644 > index 000000000000..5d6ccaa13dc2 > --- /dev/null > +++ b/Documentation/devicetree/bindings/mailbox/microchip,mpfs-mailbox.yaml > @@ -0,0 +1,46 @@ > +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) > +%YAML 1.2 > +--- > +$id: "http://devicetree.org/schemas/mailbox/microchip,mpfs-mailbox.yaml#" > +$schema: "http://devicetree.org/meta-schemas/core.yaml#" > + > +title: Microchip MPFS mss mailbox controller > + > +maintainers: > + - Conor Dooley <conor.dooley@xxxxxxxxxxxxx> > + > +properties: > + compatible: > + const: microchip,polarfire-soc-mailbox # PolarFire > + > + reg: > + items: > + - description: mailbox data registers > + - description: mailbox int registers > + maxItems: 2 > + > + interrupts: > + maxItems: 1 > + > + "#mbox-cells": > + const: 1 > + > +required: > + - compatible > + - reg > + - interrupt-parent This one is not listed as a property above. Did you run "make dt_binding_check" ? > + - interrupts > + - "#mbox-cells" > + > +unevaluatedProperties: false > +additionalProperties: false > + > +examples: > + - | > + mailbox@37020000 { > + compatible = "microchip,polarfire-soc-mailbox"; > + reg = <0x0 0x37020000 0x0 0x1000>, <0x0 0x2000318c 0x0 0x40>; > + interrupt-parent = <&L1>; > + interrupts = <96>; > + #mbox-cells = <1>; > + }; > -- Damien Le Moal Western Digital Research