There is superfluous zero in the registers base address and registers size should be twice bigger. Acked-by: Rob Herring <robh@xxxxxxxxxx> Acked-by: Thierry Reding <treding@xxxxxxxxxx> Signed-off-by: Dmitry Osipenko <digetx@xxxxxxxxx> --- .../bindings/memory-controllers/nvidia,tegra20-emc.txt | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/Documentation/devicetree/bindings/memory-controllers/nvidia,tegra20-emc.txt b/Documentation/devicetree/bindings/memory-controllers/nvidia,tegra20-emc.txt index add95367640b..567cffd37f3f 100644 --- a/Documentation/devicetree/bindings/memory-controllers/nvidia,tegra20-emc.txt +++ b/Documentation/devicetree/bindings/memory-controllers/nvidia,tegra20-emc.txt @@ -21,7 +21,7 @@ Example: #address-cells = < 1 >; #size-cells = < 0 >; compatible = "nvidia,tegra20-emc"; - reg = <0x7000f4000 0x200>; + reg = <0x7000f400 0x400>; interrupts = <0 78 0x04>; clocks = <&tegra_car TEGRA20_CLK_EMC>; } -- 2.27.0
