s/Harcode/Hardcode/ (in subject) Also fix subject format as for 4/5. On Wed, Sep 16, 2020 at 06:50:00PM +0530, Manivannan Sadhasivam wrote: > Hardcode the PCIe config SID table value. This is needed to avoid random > MHI failure observed during reboot on SM8250. > > Signed-off-by: Jonathan Marek <jonathan@xxxxxxxx> > [mani: stripped out unnecessary settings and ported for upstream] > Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@xxxxxxxxxx> > --- > drivers/pci/controller/dwc/pcie-qcom.c | 4 ++++ > 1 file changed, 4 insertions(+) > > diff --git a/drivers/pci/controller/dwc/pcie-qcom.c b/drivers/pci/controller/dwc/pcie-qcom.c > index ca8ad354e09d..50748016ce96 100644 > --- a/drivers/pci/controller/dwc/pcie-qcom.c > +++ b/drivers/pci/controller/dwc/pcie-qcom.c > @@ -57,6 +57,7 @@ > #define PCIE20_PARF_SID_OFFSET 0x234 > #define PCIE20_PARF_BDF_TRANSLATE_CFG 0x24C > #define PCIE20_PARF_DEVICE_TYPE 0x1000 > +#define PCIE20_PARF_BDF_TO_SID_TABLE_N 0x2000 > > #define PCIE20_ELBI_SYS_CTRL 0x04 > #define PCIE20_ELBI_SYS_CTRL_LT_ENABLE BIT(0) > @@ -1290,6 +1291,9 @@ static int qcom_pcie_host_init(struct pcie_port *pp) > if (ret) > goto err; > > + writel(0x0, pcie->parf + PCIE20_PARF_BDF_TO_SID_TABLE_N); > + writel(0x01000100, pcie->parf + PCIE20_PARF_BDF_TO_SID_TABLE_N + 0x054); > + > return 0; > err: > qcom_ep_reset_assert(pcie); > -- > 2.17.1 >
