Hi Peter, On 31/08/20 2:43 pm, Peter Ujfalusi wrote: > Hi Lokesh, > > On 27/08/2020 9.51, Lokesh Vutla wrote: >> The J7200 SoC is a part of the K3 Multicore SoC architecture platform. >> It is targeted for automotive gateway, vehicle compute systems, >> Vehicle-to-Vehicle (V2V) and Vehicle-to-Everything (V2X) applications. >> The SoC aims to meet the complex processing needs of modern embedded >> products. >> >> Some highlights of this SoC are: >> * Dual Cortex-A72s in a single cluster, two clusters of lockstep >> capable dual Cortex-R5F MCUs and a Centralized Device Management and >> Security Controller (DMSC). >> * Configurable L3 Cache and IO-coherent architecture with high data >> throughput capable distributed DMA architecture under NAVSS. >> * Integrated Ethernet switch supporting up to a total of 4 external ports >> in addition to legacy Ethernet switch of up to 2 ports. >> * Upto 1 PCIe-GEN3 controller, 1 USB3.0 Dual-role device subsystems, >> 20 MCANs, 3 McASP, eMMC and SD, OSPI/HyperBus memory controller, I3C >> and I2C, eCAP/eQEP, eHRPWM among other peripherals. >> * One hardware accelerator block containing AES/DES/SHA/MD5 called SA2UL >> management. >> >> See J7200 Technical Reference Manual (SPRUIU1, June 2020) >> for further details: https://www.ti.com/lit/pdf/spruiu1 >> >> Signed-off-by: Lokesh Vutla <lokeshvutla@xxxxxx> >> --- >> arch/arm64/boot/dts/ti/k3-j7200-main.dtsi | 199 ++++++++++++++++++ >> .../boot/dts/ti/k3-j7200-mcu-wakeup.dtsi | 84 ++++++++ >> arch/arm64/boot/dts/ti/k3-j7200.dtsi | 165 +++++++++++++++ >> 3 files changed, 448 insertions(+) >> create mode 100644 arch/arm64/boot/dts/ti/k3-j7200-main.dtsi >> create mode 100644 arch/arm64/boot/dts/ti/k3-j7200-mcu-wakeup.dtsi >> create mode 100644 arch/arm64/boot/dts/ti/k3-j7200.dtsi >> >> diff --git a/arch/arm64/boot/dts/ti/k3-j7200-main.dtsi b/arch/arm64/boot/dts/ti/k3-j7200-main.dtsi >> new file mode 100644 >> index 000000000000..70c8f7e941fb >> --- /dev/null >> +++ b/arch/arm64/boot/dts/ti/k3-j7200-main.dtsi >> @@ -0,0 +1,199 @@ >> +// SPDX-License-Identifier: GPL-2.0 >> +/* >> + * Device Tree Source for J7200 SoC Family Main Domain peripherals >> + * >> + * Copyright (C) 2020 Texas Instruments Incorporated - https://www.ti.com/ >> + */ >> + >> +&cbass_main { >> + msmc_ram: sram@70000000 { >> + compatible = "mmio-sram"; >> + reg = <0x0 0x70000000 0x0 0x100000>; >> + #address-cells = <1>; >> + #size-cells = <1>; >> + ranges = <0x0 0x0 0x70000000 0x100000>; >> + >> + atf-sram@0 { >> + reg = <0x0 0x20000>; >> + }; >> + }; >> + >> + gic500: interrupt-controller@1800000 { >> + compatible = "arm,gic-v3"; >> + #address-cells = <2>; >> + #size-cells = <2>; >> + ranges; >> + #interrupt-cells = <3>; >> + interrupt-controller; >> + reg = <0x00 0x01800000 0x00 0x10000>, /* GICD */ >> + <0x00 0x01900000 0x00 0x100000>; /* GICR */ >> + >> + /* vcpumntirq: virtual CPU interface maintenance interrupt */ >> + interrupts = <GIC_PPI 9 IRQ_TYPE_LEVEL_HIGH>; >> + >> + gic_its: msi-controller@1820000 { >> + compatible = "arm,gic-v3-its"; >> + reg = <0x00 0x01820000 0x00 0x10000>; >> + socionext,synquacer-pre-its = <0x1000000 0x400000>; >> + msi-controller; >> + #msi-cells = <1>; >> + }; >> + }; >> + >> + main_navss: navss@30000000 { >> + compatible = "simple-mfd"; >> + #address-cells = <2>; >> + #size-cells = <2>; >> + ranges = <0x00 0x30000000 0x00 0x30000000 0x00 0x0c400000>; >> + >> + secure_proxy_main: mailbox@32c00000 { >> + compatible = "ti,am654-secure-proxy"; >> + #mbox-cells = <1>; >> + reg-names = "target_data", "rt", "scfg"; >> + reg = <0x00 0x32c00000 0x00 0x100000>, >> + <0x00 0x32400000 0x00 0x100000>, >> + <0x00 0x32800000 0x00 0x100000>; >> + interrupt-names = "rx_011"; >> + interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>; >> + }; > > Would it make sense to have the nodes needed for DMA also in the initial > commit? > mainline is prepared for it. They are fairly independent patches. IMHO, they can come separately. This series is lying around for long time. I would prefer to get this base support in asap. Thanks and regards, Lokesh > > - Péter > > Texas Instruments Finland Oy, Porkkalankatu 22, 00180 Helsinki. > Y-tunnus/Business ID: 0615521-4. Kotipaikka/Domicile: Helsinki >
