Hi Rob, Philipp, Matthias and all Gentle ping for this patch set. Thanks Crystal > > -----Original Message----- > From: Crystal Guo [mailto:crystal.guo@xxxxxxxxxxxx] > Sent: Monday, August 17, 2020 11:03 AM > To: p.zabel@xxxxxxxxxxxxxx; robh+dt@xxxxxxxxxx; matthias.bgg@xxxxxxxxx > Cc: srv_heupstream; linux-mediatek@xxxxxxxxxxxxxxxxxxx; linux-arm-kernel@xxxxxxxxxxxxxxxxxxx; linux-kernel@xxxxxxxxxxxxxxx; devicetree@xxxxxxxxxxxxxxx; s-anna@xxxxxx; afd@xxxxxx; Seiya Wang (王迺君); Stanley Chu (朱原陞); Yingjoe Chen (陳英洲); Fan Chen (陳凡); Yong Liang (梁勇) > Subject: [v4,0/4] introduce TI reset controller for MT8192 SoC > > v4: > fix typos on v3 commit message. > > v3: > 1. revert v2 changes. > 2. add 'reset-duration-us' property to declare a minimum delay, which needs to be waited between assert and deassert. > 3. add 'mediatek,infra-reset' to compatible. > > > v2 changes: > https://patchwork.kernel.org/patch/11697371/ > 1. add 'assert-deassert-together' property to introduce a new reset handler, which allows device to do serialized assert and deassert operations in a single step by 'reset' method. > 2. add 'update-force' property to introduce force-update method, which forces the write operation in case the read already happens to return the correct value. > 3. add 'generic-reset' to compatible > > v1 changes: > https://patchwork.kernel.org/patch/11690523/ > https://patchwork.kernel.org/patch/11690527/ > > Crystal Guo (4): > dt-binding: reset-controller: ti: add reset-duration-us property > dt-binding: reset-controller: ti: add 'mediatek,infra-reset' to > compatible > reset-controller: ti: introduce a new reset handler > arm64: dts: mt8192: add infracfg_rst node > > .../bindings/reset/ti-syscon-reset.txt | 6 +++++ > arch/arm64/boot/dts/mediatek/mt8192.dtsi | 11 +++++++- > drivers/reset/reset-ti-syscon.c | 26 +++++++++++++++++-- > 3 files changed, 40 insertions(+), 3 deletions(-) > > > *********************MEDIATEK Confidential/Internal Use*********************
