[PATCH v2 0/8] Add C66x & C71x DSP nodes on J721E SoCs

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Hi Nishanth,

The following is a revised version of the series [1] that adds the base
dt nodes for the 2 C66x and 1 C71x DSP remote processors present in MAIN
domain on J721E SoCs, and the required nodes to boot these successfully
on J721E EVM board. It addresses the cleanup comments from you.

The patches are based on top of the pending ABI 3.0 pull-request [2] and
I have used your temporary staging branch [3] as the baseline.

Main changes in v2:
- Patch 1 is new, and moves all the mailbox dts nodes from the common
  board dts file to the k3-j721e-som-p0.dtsi file
- Patches 3 & 6 are reworked to add the mboxes properties directly
  in the k3-j721e-som-p0.dtsi file
- Patches 4 & 8 are rebased versions to sit on top of the modified
  mailbox addition patches
- Patches 2, 5 and 8 are unchanged

regards
Suman

[1] https://patchwork.kernel.org/cover/11725347/
[2] https://lore.kernel.org/patchwork/patch/1295019/
[3] https://git.kernel.org/pub/scm/linux/kernel/git/nmenon/linux.git/log/?h=ti-k3-dts-stage

Suman Anna (8):
  arm64: dts: ti: k3-j721e-som-p0: Move mailbox nodes from board dts
    file
  arm64: dts: ti: k3-j721e-main: Add C66x DSP nodes
  arm64: dts: ti: k3-j721e-som-p0: Add mailboxes to C66x DSPs
  arm64: dts: ti: k3-j721e-som-p0: Add DDR carveout memory nodes for C66
    DSPs
  arm64: dts: ti: k3-j721e-main: Add C71x DSP node
  arm64: dts: ti: k3-j721e-som-p0: Add mailboxes to C71x DSP
  arm64: dts: ti: k3-j721e-som-p0: Add DDR carveout memory nodes for
    C71x DSP
  arm64: dts: ti: k3-j721e-som-p0: Reserve memory for IPC between RTOS
    cores

 .../dts/ti/k3-j721e-common-proc-board.dts     |  93 -----------
 arch/arm64/boot/dts/ti/k3-j721e-main.dtsi     |  38 +++++
 arch/arm64/boot/dts/ti/k3-j721e-som-p0.dtsi   | 153 ++++++++++++++++++
 3 files changed, 191 insertions(+), 93 deletions(-)

-- 
2.28.0




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