On Sat, Jul 18, 2020 at 10:47:08PM +0800, vineetha.g.jaya.kumaran@xxxxxxxxx wrote: > From: "Vineetha G. Jaya Kumaran" <vineetha.g.jaya.kumaran@xxxxxxxxx> > > Add PWM Device Tree bindings documentation for the Intel Keem Bay SoC. > > Signed-off-by: Vineetha G. Jaya Kumaran <vineetha.g.jaya.kumaran@xxxxxxxxx> > --- > .../devicetree/bindings/pwm/intel,keembay-pwm.yaml | 45 ++++++++++++++++++++++ > 1 file changed, 45 insertions(+) > create mode 100644 Documentation/devicetree/bindings/pwm/intel,keembay-pwm.yaml > > diff --git a/Documentation/devicetree/bindings/pwm/intel,keembay-pwm.yaml b/Documentation/devicetree/bindings/pwm/intel,keembay-pwm.yaml > new file mode 100644 > index 00000000..e9388a7 > --- /dev/null > +++ b/Documentation/devicetree/bindings/pwm/intel,keembay-pwm.yaml > @@ -0,0 +1,45 @@ > +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) > +# Copyright (C) 2020 Intel Corporation > +%YAML 1.2 > +--- > +$id: http://devicetree.org/schemas/pwm/intel,keembay-pwm.yaml# > +$schema: http://devicetree.org/meta-schemas/core.yaml# > + > +title: Intel Keem Bay PWM Device Tree Bindings > + > +maintainers: > + - Vineetha G. Jaya Kumaran <vineetha.g.jaya.kumaran@xxxxxxxxx> > + > +allOf: > + - $ref: pwm.yaml# > + > +properties: > + compatible: > + enum: > + - intel,keembay-pwm > + > + reg: > + maxItems: 1 > + > + clocks: > + maxItems: 1 > + > + "#pwm-cells": > + const: 2 > + > +required: > + - compatible > + - reg > + - clocks > + - '#pwm-cells' Add: additionalProperties: false With that, Reviewed-by: Rob Herring <robh@xxxxxxxxxx> > + > +examples: > + - | > + #define KEEM_BAY_A53_GPIO > + > + pwm@203200a0 { > + compatible = "intel,keembay-pwm"; > + reg = <0x203200a0 0xe8>; > + clocks = <&scmi_clk KEEM_BAY_A53_GPIO>; > + #pwm-cells = <2>; > + }; > -- > 1.9.1 >
