Re: [PATCH 1/2] dt-bindings: update usb-c-connector required property

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Hi Biju,

On Fri, Jul 17, 2020 at 10:09 AM Biju Das <biju.das.jz@xxxxxxxxxxxxxx> wrote:
> > On Fri, Jul 17, 2020 at 08:34:33AM +0100, Biju Das wrote:
> > > Some boards have a single SS capable connector. Update usb-c-connector
> > > bindings to list port@1 as at least one of the required property.
> > >
> > > Signed-off-by: Biju Das <biju.das.jz@xxxxxxxxxxxxxx>
> > > Signed-off-by: Lad Prabhakar <prabhakar.mahadev-
> > lad.rj@xxxxxxxxxxxxxx>
> > > ---
> > >  Ref: https://patchwork.kernel.org/patch/11129567/
> > > ---
> > >  Documentation/devicetree/bindings/connector/usb-connector.yaml | 7
> > > +++++--
> > >  1 file changed, 5 insertions(+), 2 deletions(-)
> > >
> > > diff --git
> > > a/Documentation/devicetree/bindings/connector/usb-connector.yaml
> > > b/Documentation/devicetree/bindings/connector/usb-connector.yaml
> > > index 9bd52e6..41e0685 100644
> > > --- a/Documentation/devicetree/bindings/connector/usb-connector.yaml
> > > +++ b/Documentation/devicetree/bindings/connector/usb-
> > connector.yaml
> > > @@ -139,8 +139,11 @@ properties:
> > >          description: Sideband Use (SBU), present in USB-C. This describes the
> > >            alternate mode connection of which SBU is a part.
> > >
> > > -    required:
> > > -      - port@0
> > > +    anyOf:
> > > +      - required:
> > > +        - port@0
> > > +      - required:
> > > +        - port@1
> >
> > So the connector[1] doesn't have any High Speed (D+/D-) lanes? Those are
> > supposed to be present on all Type C connectors.
>
> Yes , USB-TypeC connector has  USB3HS0_DP and USB3HS0_DM signals apart from USB3S0_CLK_P, USB3S0_CLK_M,USB3S0_RX_P,USB3S0_RX_M,USB3S0_TX_P,USB3S0_TX_M,
> USB3HS0_DP,USB3HS0_DM, USB30_PWEN and USB30_OVC.
>
> But the Connector is a SS Capable connector which supports UFP/DFP and DRP.

The SS lanes of the connector are tied to the HD3SS3220.
The D+/D- lanes of the connector are tied to the R-Car SoC directly.

Perhaps modelling the C connector as a child of the HD3SS3220 is the
issue?  If the C connector was a separate node, it could have port@1
point to the HD3SS3220, and port@0 to the SoC?
That means there needs to be a different way to link the HD3SS3220 and
the on-SoC usb3_peri0.  The current link between usb3_peri0 and
hd3ss3220_ep looks a bit strange to me, as the latter label points to
the C connector, not to the HD3SS3220 itself[2].

> > [1] : https://patchwork.kernel.org/patch/11129567/

[2] https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/tree/arch/arm64/boot/dts/renesas/r8a774c0-cat874.dts

Gr{oetje,eeting}s,

                        Geert

-- 
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@xxxxxxxxxxxxxx

In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
                                -- Linus Torvalds



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