The series is meant to support SMMU for AP806 and a workaround for accessing ARM SMMU 64bit registers is the gist of it. For the record, AP-806 can't access SMMU registers with 64bit width. This patches split the readq/writeq into two 32bit accesses instead and update DT bindings. The series was successfully tested on a vanilla v5.8-rc3 kernel and Intel e1000e PCIe NIC. The same for platform devices like SATA and USB. For reference, previous versions are listed below: V1: https://lkml.org/lkml/2018/10/15/373 V2: https://lkml.org/lkml/2019/7/11/426 V3: https://lkml.org/lkml/2020/7/2/1114 v3 -> v4 - call cfg_probe() impl hook a bit earlier which simplifies errata handling - use hi_lo_readq_relaxed() and hi_lo_writeq_relaxed() for register accessors - keep SMMU status disabled by default and enable where possible (DTS changes) - commit logs improvements and other minor fixes Hanna Hawa (1): iommu/arm-smmu: Workaround for Marvell Armada-AP806 SoC erratum #582743 Marcin Wojtas (1): arm64: dts: marvell: add SMMU support Tomasz Nowicki (2): iommu/arm-smmu: Call configuration impl hook before consuming features dt-bindings: arm-smmu: add compatible string for Marvell Armada-AP806 SMMU-500 Documentation/arm64/silicon-errata.rst | 3 ++ .../devicetree/bindings/iommu/arm,smmu.yaml | 4 ++ arch/arm64/boot/dts/marvell/armada-7040.dtsi | 28 ++++++++++++ arch/arm64/boot/dts/marvell/armada-8040.dtsi | 40 +++++++++++++++++ arch/arm64/boot/dts/marvell/armada-ap80x.dtsi | 18 ++++++++ drivers/iommu/arm-smmu-impl.c | 45 +++++++++++++++++++ drivers/iommu/arm-smmu.c | 11 +++-- 7 files changed, 145 insertions(+), 4 deletions(-) -- 2.17.1
