On Fri, 2020-07-10 at 16:13 +0200, Joerg Roedel wrote: > On Fri, Jul 03, 2020 at 12:41:17PM +0800, Chao Hao wrote: > > Chao Hao (10): > > dt-bindings: mediatek: Add bindings for MT6779 > > iommu/mediatek: Rename the register STANDARD_AXI_MODE(0x48) to MISC_CTRL > > iommu/mediatek: Use a u32 flags to describe different HW features > > iommu/mediatek: Setting MISC_CTRL register > > iommu/mediatek: Move inv_sel_reg into the plat_data > > iommu/mediatek: Add sub_comm id in translation fault > > iommu/mediatek: Add REG_MMU_WR_LEN_CTRL register definition > > iommu/mediatek: Extend protect pa alignment value > > iommu/mediatek: Modify MMU_CTRL register setting > > iommu/mediatek: Add mt6779 basic support > > Applied, thanks. Hi Joerg, Thanks for the apply. The SMI part always go with the IOMMU, Could you also help apply the mt6779 SMI basical part [1][2]. Both has already got reviewed-by from Rob and Matthias. and the [3] in that patchset is for performance improvement, it's not so necessary, it can be send in another patchset. [1] https://lore.kernel.org/patchwork/patch/1176833/ [2] https://lore.kernel.org/patchwork/patch/1176831/ [3] https://lore.kernel.org/patchwork/patch/1176832/
