Re: [PATCH v1 2/2] usb: phy: Add USB3 PHY support for Intel LGM SoC

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Hi Philipp,

   Thanks for the review comments...

On 9/6/2020 8:14 pm, Philipp Zabel wrote:
+
+	for (i = 0; i < ARRAY_SIZE(CTL_RESETS); i++)
+		reset_control_deassert(resets[i]);
+	/* Need to wait at least 20us before de-assert the PHY */
+	usleep_range(20, 100);
This waits 20us after de-asserting the reset, not before. Is this in the
correct place?
This is correct place , but the above mentioned comments are wrong, need to re-write the comments as below...

/* out-of-band reset of the controller after PHY reset
 * will cause controller malfunctioning, so should use in-bandcontroller
 * reset only and leave the controller de-asserted here.
 */
    for (i = 0; i < ARRAY_SIZE(CTL_RESETS); i++)
            reset_control_deassert(resets[i]);

/* Need to wait at least 20us after de-assert the PHY */
    usleep_range(20, 100);


Regards
Vadivel





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