Re: [PATCH v1 2/2] usb: phy: Add USB3 PHY support for Intel LGM SoC

[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]

 



Hi Philipp,

Thank you very much for review comments and your time...

On 9/6/2020 8:14 pm, Philipp Zabel wrote:
+
+	for (i = 0; i < ARRAY_SIZE(CTL_RESETS); i++) {
+		resets[i] = devm_reset_control_get(dev, CTL_RESETS[i]);
Please use devm_reset_control_get_exclusive() instead.
Noted, will use it.

+		if (IS_ERR(resets[i])) {
+			dev_err(dev, "%s reset not found\n", CTL_RESETS[i]);
+			return PTR_ERR(resets[i]);
+		}
+		reset_control_assert(resets[i]);
+	}
You should request all reset controls first, and only then start
asserting / deasserting, otherwise you may end up with partially
asserted resets in case a later reset control is not found.
Agreed!, re-write the assert/de-assert logic as you have suggested.

+
+	for (i = 0; i < ARRAY_SIZE(PHY_RESETS); i++) {
+		ta->resets[i] = devm_reset_control_get(dev, PHY_RESETS[i]);
Same as above.

+		if (IS_ERR(ta->resets[i])) {
+			dev_err(dev, "%s reset not found\n", PHY_RESETS[i]);
+			return PTR_ERR(ta->resets[i]);
+		}
+		reset_control_assert(ta->resets[i]);
+	}
+
+	for (i = 0; i < ARRAY_SIZE(CTL_RESETS); i++)
+		reset_control_deassert(resets[i]);
+	/* Need to wait at least 20us before de-assert the PHY */
+	usleep_range(20, 100);
This waits 20us after de-asserting the reset, not before. Is this in the
correct place?
yes, you are right, it's in wrong place, Thanks!

Regards
Vadivel




[Index of Archives]     [Device Tree Compilter]     [Device Tree Spec]     [Linux Driver Backports]     [Video for Linux]     [Linux USB Devel]     [Linux PCI Devel]     [Linux Audio Users]     [Linux Kernel]     [Linux SCSI]     [XFree86]     [Yosemite Backpacking]


  Powered by Linux