On Tue, Jun 09, 2020 at 06:45:31PM +0800, Roger Lu wrote: > Document the binding for enabling mtk svs on MediaTek SoC. > > Signed-off-by: Roger Lu <roger.lu@xxxxxxxxxxxx> > --- > .../bindings/power/avs/mtk_svs.yaml | 141 ++++++++++++++++++ > 1 file changed, 141 insertions(+) > create mode 100644 Documentation/devicetree/bindings/power/avs/mtk_svs.yaml > > diff --git a/Documentation/devicetree/bindings/power/avs/mtk_svs.yaml b/Documentation/devicetree/bindings/power/avs/mtk_svs.yaml > new file mode 100644 > index 000000000000..f16f4eb56ee3 > --- /dev/null > +++ b/Documentation/devicetree/bindings/power/avs/mtk_svs.yaml > @@ -0,0 +1,141 @@ > +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) > +%YAML 1.2 > +--- > +$id: http://devicetree.org/schemas/power/avs/mtk_svs.yaml# > +$schema: http://devicetree.org/meta-schemas/core.yaml# > + > +title: Introduce SVS engine > + > +maintainers: > + - Kevin Hilman <khilman@xxxxxxxxxx> > + - Nishanth Menon <nm@xxxxxx> > + > +description: |+ > + The Smart Voltage Scaling(SVS) engine is a piece of hardware > + which has several controllers(banks) for calculating suitable > + voltage to different power domains(CPU/GPU/CCI) according to > + chip process corner, temperatures and other factors. Then DVFS > + driver could apply SVS bank voltage to PMIC/Buck. > + > +properties: > + compatible: > + const: mediatek,mt8183-svs > + > + reg: > + description: Address range of the MTK SVS controller. > + maxItems: 1 > + > + interrupts: > + description: IRQ for the MTK SVS controller. > + maxItems: 1 > + > + clocks: > + description: Main clock for svs controller to work. > + > + clock-names: > + const: main > + > + nvmem-cells: > + maxItems: 2 > + description: > + Phandle to the calibration data provided by a nvmem device. > + > + nvmem-cell-names: > + items: > + - const: svs-calibration-data > + - const: calibration-data > + > +patternProperties: > + "^svs-(cpu-little|cpu-big|cci|gpu)$": > + type: object > + description: > + Each subnode represents one SVS bank. > + - svs-cpu-little (SVS bank device node of little CPU) > + - svs-cpu-big (SVS bank device node of big CPU) > + - svs-cci (SVS bank device node of CCI) > + - svs-gpu (SVS bank device node of GPU) As I've said before, I don't think these child nodes make sense. All this data should already be available elsewhere in the DT. Rob
