On Thu, May 14, 2020 at 09:03:20PM +0900, Kunihiko Hayashi wrote: > Add DT bindings for PCIe controller implemented in UniPhier SoCs > when configured in endpoint mode. This controller is based on > the DesignWare PCIe core. > > Signed-off-by: Kunihiko Hayashi <hayashi.kunihiko@xxxxxxxxxxxxx> > --- > .../bindings/pci/socionext,uniphier-pcie-ep.yaml | 92 ++++++++++++++++++++++ > MAINTAINERS | 2 +- > 2 files changed, 93 insertions(+), 1 deletion(-) > create mode 100644 Documentation/devicetree/bindings/pci/socionext,uniphier-pcie-ep.yaml Hi Rob, are you OK with this patch ? Please let me know, I'd like to pull the series, thanks. Lorenzo > diff --git a/Documentation/devicetree/bindings/pci/socionext,uniphier-pcie-ep.yaml b/Documentation/devicetree/bindings/pci/socionext,uniphier-pcie-ep.yaml > new file mode 100644 > index 0000000..f0558b9 > --- /dev/null > +++ b/Documentation/devicetree/bindings/pci/socionext,uniphier-pcie-ep.yaml > @@ -0,0 +1,92 @@ > +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) > +%YAML 1.2 > +--- > +$id: http://devicetree.org/schemas/pci/socionext,uniphier-pcie-ep.yaml# > +$schema: http://devicetree.org/meta-schemas/core.yaml# > + > +title: Socionext UniPhier PCIe endpoint controller > + > +description: | > + UniPhier PCIe endpoint controller is based on the Synopsys DesignWare > + PCI core. It shares common features with the PCIe DesignWare core and > + inherits common properties defined in > + Documentation/devicetree/bindings/pci/designware-pcie.txt. > + > +maintainers: > + - Kunihiko Hayashi <hayashi.kunihiko@xxxxxxxxxxxxx> > + > +allOf: > + - $ref: "pci-ep.yaml#" > + > +properties: > + compatible: > + const: socionext,uniphier-pro5-pcie-ep > + > + reg: > + maxItems: 4 > + > + reg-names: > + items: > + - const: dbi > + - const: dbi2 > + - const: link > + - const: addr_space > + > + clocks: > + maxItems: 2 > + > + clock-names: > + items: > + - const: gio > + - const: link > + > + resets: > + maxItems: 2 > + > + reset-names: > + items: > + - const: gio > + - const: link > + > + num-ib-windows: > + const: 16 > + > + num-ob-windows: > + const: 16 > + > + num-lanes: true > + > + phys: > + maxItems: 1 > + > + phy-names: > + const: pcie-phy > + > +required: > + - compatible > + - reg > + - reg-names > + - clocks > + - clock-names > + - resets > + - reset-names > + > +additionalProperties: false > + > +examples: > + - | > + pcie_ep: pcie-ep@66000000 { > + compatible = "socionext,uniphier-pro5-pcie-ep"; > + reg-names = "dbi", "dbi2", "link", "addr_space"; > + reg = <0x66000000 0x1000>, <0x66001000 0x1000>, > + <0x66010000 0x10000>, <0x67000000 0x400000>; > + clock-names = "gio", "link"; > + clocks = <&sys_clk 12>, <&sys_clk 24>; > + reset-names = "gio", "link"; > + resets = <&sys_rst 12>, <&sys_rst 24>; > + num-ib-windows = <16>; > + num-ob-windows = <16>; > + num-lanes = <4>; > + phy-names = "pcie-phy"; > + phys = <&pcie_phy>; > + }; > diff --git a/MAINTAINERS b/MAINTAINERS > index 92657a1..7f26748 100644 > --- a/MAINTAINERS > +++ b/MAINTAINERS > @@ -13211,7 +13211,7 @@ PCIE DRIVER FOR SOCIONEXT UNIPHIER > M: Kunihiko Hayashi <hayashi.kunihiko@xxxxxxxxxxxxx> > L: linux-pci@xxxxxxxxxxxxxxx > S: Maintained > -F: Documentation/devicetree/bindings/pci/uniphier-pcie.txt > +F: Documentation/devicetree/bindings/pci/uniphier-pcie* > F: drivers/pci/controller/dwc/pcie-uniphier.c > > PCIE DRIVER FOR ST SPEAR13XX > -- > 2.7.4 >
