On Wed, May 06, 2020 at 08:42:30PM +0300, Sergey.Semin@xxxxxxxxxxxxxxxxxxxx wrote: > From: Serge Semin <Sergey.Semin@xxxxxxxxxxxxxxxxxxxx> > > When XPA mode is enabled the normally 32-bits MAAR pair registers > are extended to be of 64-bits width as in pure 64-bits MIPS > architecture. In this case the MAAR registers can enable the > speculative loads/stores for addresses of up to 39-bits width. > But in this case the process of the MAAR initialization changes a bit. > The upper 32-bits of the registers are supposed to be accessed by mean > of the dedicated instructions mfhc0/mthc0 and there is a CP0.MAAR.VH > bit which should be set together with CP0.MAAR.VL as indication > of the boundary validity. All of these peculiarities were taken into > account in this commit so the speculative loads/stores would work > when XPA mode is enabled. > > Co-developed-by: Alexey Malahov <Alexey.Malahov@xxxxxxxxxxxxxxxxxxxx> > Signed-off-by: Alexey Malahov <Alexey.Malahov@xxxxxxxxxxxxxxxxxxxx> > Signed-off-by: Serge Semin <Sergey.Semin@xxxxxxxxxxxxxxxxxxxx> > Cc: Thomas Bogendoerfer <tsbogend@xxxxxxxxxxxxxxxx> > Cc: Paul Burton <paulburton@xxxxxxxxxx> > Cc: Ralf Baechle <ralf@xxxxxxxxxxxxxx> > Cc: Arnd Bergmann <arnd@xxxxxxxx> > Cc: Rob Herring <robh+dt@xxxxxxxxxx> > Cc: linux-pm@xxxxxxxxxxxxxxx > Cc: devicetree@xxxxxxxxxxxxxxx > --- > arch/mips/include/asm/maar.h | 17 +++++++++++++++-- > arch/mips/include/asm/mipsregs.h | 10 ++++++++++ > arch/mips/mm/init.c | 8 +++++++- > 3 files changed, 32 insertions(+), 3 deletions(-) applied to mips-next. Thomas. -- Crap can work. Given enough thrust pigs will fly, but it's not necessarily a good idea. [ RFC1925, 2.3 ]
