On Thu, 30 Apr 2020 22:10:47 +0100, Andre Przywara wrote: > Convert the Calxeda clock bindings to DT schema format using json-schema. > > This just covers the actual PLL and divider clock nodes. In the actual > DTs they are somewhat unconnected (no ranges or bus compatible) children > of the sregs node, but for the actual clock bindings this is not > relevant. > > One oddity is that the addresses are relative to the parent node, > without that being pronounced using a ranges property. > But this is too late to fix now. > > Signed-off-by: Andre Przywara <andre.przywara@xxxxxxx> > Acked-by: Stephen Boyd <sboyd@xxxxxxxxxx> > --- > .../devicetree/bindings/clock/calxeda.txt | 17 ---- > .../devicetree/bindings/clock/calxeda.yaml | 82 +++++++++++++++++++ > 2 files changed, 82 insertions(+), 17 deletions(-) > delete mode 100644 Documentation/devicetree/bindings/clock/calxeda.txt > create mode 100644 Documentation/devicetree/bindings/clock/calxeda.yaml > Applied, thanks. Rob